[llvm-commits] [llvm] r40982 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/Target/X86/X86InstrSSE.td

[Dan Gohman]

> +def memopv8i8  : PatFrag<(ops node:$ptr), (v8i8  (memop node:$ptr))>;

> +def memopv4i16 : PatFrag<(ops node:$ptr), (v4i16 (memop node:$ptr))>;

> +def memopv2i32 : PatFrag<(ops node:$ptr), (v2i32 (memop node:$ptr))>;

> +   def rr64 : SS38I<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src),

It's surprising to see MMX register and 64-bit vector memory operands in
X86InstrSSE.td, when there is a separate X86InstrMMX.td file, though
perhaps it makes sense since there is commonality. Please add some
comments that make note of this.

memop's predicate currently always requires 16-byte alignment, which I
assume is incorrect for the MMX forms of these instructions. I guess
you'll either want to make memop more general, or add new predicates for
MMX memory operands to use 8-byte alignment. If you modify memop, be
careful about instructions like FsANDPDrm, which use memop to operate on
64-bit values yet still require 128-bit memory operand alignment (on
subtargets where alignment is required).

Dan

-- 
Dan Gohman, Cray Inc.