[llvm-commits] [llvm] r40904 - /llvm/trunk/docs/CommandGuide/lli.pod
Reid Spencer
rspencer at reidspencer.com
Tue Aug 7 10:48:56 PDT 2007
Author: reid
Date: Tue Aug 7 12:48:56 2007
New Revision: 40904
URL: http://llvm.org/viewvc/llvm-project?rev=40904&view=rev
Log:
Okay, over/back tags don't next.
Modified:
llvm/trunk/docs/CommandGuide/lli.pod
Modified: llvm/trunk/docs/CommandGuide/lli.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/lli.pod?rev=40904&r1=40903&r2=40904&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/lli.pod (original)
+++ llvm/trunk/docs/CommandGuide/lli.pod Tue Aug 7 12:48:56 2007
@@ -121,13 +121,15 @@
=head1 CODE GENERATION OPTIONS
-=over
+=over 4
=item B<-code-model>=I<model>
Choose the code model from:
-=over 2
+=back
+
+=over 8
=item I<default>: Target default code model
@@ -141,6 +143,8 @@
=back
+=over 4
+
=item B<-disable-post-RA-scheduler>
Disable scheduling after register allocation.
@@ -168,7 +172,9 @@
Instruction schedulers available (before register allocation):
-=over 2
+=back
+
+=over 8
=item I<=default>: Best scheduler for the target
@@ -186,11 +192,15 @@
=back
+=over 4
+
=item B<-regalloc>=I<allocator>
Register allocator to use: (default = linearscan)
-=over 2
+=back
+
+=over 8
=item I<=bigblock>: Big-block register allocator
@@ -200,11 +210,15 @@
=back
+=over 4
+
=item B<-relocation-model>=I<model>
Choose relocation model from:
-=over 2
+=back
+
+=over 8
=item I<=default>: Target default relocation model
@@ -214,11 +228,15 @@
=back
+=over 4
+
=item B<-spiller>
Spiller to use: (default: local)
-=over 2
+=back
+
+=over 8
=item I<=simple>: simple spiller
@@ -226,11 +244,15 @@
=back
+=over 4
+
=item B<-x86-asm-syntax>=I<syntax>
Choose style of code to emit from X86 backend:
-=over 2
+=back
+
+=over 8
=item I<=att>: Emit AT&T-style assembly
@@ -238,8 +260,6 @@
=back
-=back
-
=head1 EXIT STATUS
If B<lli> fails to load the program, it will exit with an exit code of 1.
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