[llvm-commits] [llvm] r40537 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

[Evan Cheng]

Author: evancheng
Date: Thu Jul 26 12:32:14 2007
New Revision: 40537

URL: http://llvm.org/viewvc/llvm-project?rev=40537&view=rev
Log:
Don't pollute the meaning of isUnpredicatedTerminator.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=40537&r1=40536&r2=40537&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Thu Jul 26 12:32:14 2007
@@ -402,11 +402,7 @@
   }
 }
 
-// For purposes of branch analysis do not count FP_REG_KILL as a terminator.
 bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
-  if (MI->getOpcode() == X86::FP_REG_KILL)
-    return false;
-
   const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
   if (TID->Flags & M_TERMINATOR_FLAG) {
     // Conditional branch is a special case.
@@ -419,20 +415,28 @@
   return false;
 }
 
+// For purposes of branch analysis do not count FP_REG_KILL as a terminator.
+static bool isBrAnalysisUnpredicatedTerminator(const MachineInstr *MI,
+                                               const X86InstrInfo &TII) {
+  if (MI->getOpcode() == X86::FP_REG_KILL)
+    return false;
+  return TII.isUnpredicatedTerminator(MI);
+}
+
 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, 
                                  MachineBasicBlock *&TBB,
                                  MachineBasicBlock *&FBB,
                                  std::vector<MachineOperand> &Cond) const {
   // If the block has no terminators, it just falls into the block after it.
   MachineBasicBlock::iterator I = MBB.end();
-  if (I == MBB.begin() || !isUnpredicatedTerminator(--I))
+  if (I == MBB.begin() || !isBrAnalysisUnpredicatedTerminator(--I, *this))
     return false;
 
   // Get the last instruction in the block.
   MachineInstr *LastInst = I;
   
   // If there is only one terminator instruction, process it.
-  if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
+  if (I == MBB.begin() || !isBrAnalysisUnpredicatedTerminator(--I, *this)) {
     if (!isBranch(LastInst->getOpcode()))
       return true;
     
@@ -457,7 +461,8 @@
   MachineInstr *SecondLastInst = I;
   
   // If there are three terminators, we don't know what sort of block this is.
-  if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I))
+  if (SecondLastInst && I != MBB.begin() &&
+      isBrAnalysisUnpredicatedTerminator(--I, *this))
     return true;
 
   // If the block ends with X86::JMP and a conditional branch, handle it.