[llvm-commits] [llvm] r40117 - /llvm/trunk/docs/LangRef.html

[Reid Spencer]

Author: reid
Date: Fri Jul 20 15:03:33 2007
New Revision: 40117

URL: http://llvm.org/viewvc/llvm-project?rev=40117&view=rev
Log:
Silly HTML

Modified:
    llvm/trunk/docs/LangRef.html

Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=40117&r1=40116&r2=40117&view=diff

==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Fri Jul 20 15:03:33 2007
@@ -5078,13 +5078,13 @@
 <p>
   The <tt>llvm.memory.barrier</tt> intrinsic requires four boolean arguments. 
   Each argument enables a specific barrier as listed below.
+</p>
   <ul>
     <li><tt>ll</tt>: load-load barrier</li>
     <li><tt>ls</tt>: load-store barrier</li>
     <li><tt>sl</tt>: store-load barrier</li>
     <li><tt>ss</tt>: store-store barrier</li>
   </ul>
-</p>
 <h5>Semantics:</h5>
 <p>
   This intrinsic causes the system to enforce some ordering constraints upon 
@@ -5094,6 +5094,7 @@
   (f.ex.  load-load, or store-load), all of the first operations preceding the 
   barrier will complete before any of the second operations succeeding the 
   barrier begin. Specifically the semantics for each pairing is as follows:
+</p>
   <ul>
     <li><tt>ll</tt>: All loads before the barrier must complete before any load 
     after the barrier begins.</li>
@@ -5104,6 +5105,7 @@
     <li><tt>sl</tt>: All stores before the barrier must complete before any 
     load after the barrier begins.</li>
   </ul>
+<p>
   These semantics are applied with a logical "and" behavior when more than  one 
   is enabled in a single memory barrier intrinsic.
 </p>