[llvm-commits] [llvm] r38480 - /llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp

[Owen Anderson]

Author: resistor
Date: Mon Jul  9 19:27:22 2007
New Revision: 38480

URL: http://llvm.org/viewvc/llvm-project?rev=38480&view=rev
Log:
Move some key maps from std::map to DenseMap.  This improves the time to optimize Anton's testcase from 17.5s
to 15.7s.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp?rev=38480&r1=38479&r2=38480&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp Mon Jul  9 19:27:22 2007
@@ -556,6 +556,10 @@
     BitVector numbers;
   public:
     ValueNumberedSet() { numbers.resize(1); }
+    ValueNumberedSet(const ValueNumberedSet& other) {
+      numbers = other.numbers;
+      contents = other.contents;
+    }
     
     typedef SmallPtrSet<Value*, 8>::iterator iterator;
     
@@ -614,9 +618,9 @@
     ValueTable VN;
     std::vector<Instruction*> createdExpressions;
     
-    std::map<BasicBlock*, ValueNumberedSet> availableOut;
-    std::map<BasicBlock*, ValueNumberedSet> anticipatedIn;
-    std::map<BasicBlock*, ValueNumberedSet> generatedPhis;
+    DenseMap<BasicBlock*, ValueNumberedSet> availableOut;
+    DenseMap<BasicBlock*, ValueNumberedSet> anticipatedIn;
+    DenseMap<BasicBlock*, ValueNumberedSet> generatedPhis;
     
     // This transformation requires dominator postdominator info
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
@@ -1175,7 +1179,7 @@
           isa<ExtractElementInst>(BI) || isa<SelectInst>(BI) ||
           isa<CastInst>(BI) || isa<GetElementPtrInst>(BI)) {
         
-        if (availableOut[BB].test(VN.lookup(BI)) && ! availableOut[BB].count(BI)) {
+        if (availableOut[BB].test(VN.lookup(BI)) && !availableOut[BB].count(BI)) {
           Value *leader = find_leader(availableOut[BB], VN.lookup(BI));
           if (Instruction* Instr = dyn_cast<Instruction>(leader))
             if (Instr->getParent() != 0 && Instr != BI) {