[llvm-commits] [llvm] r37893 - /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td

[Chris Lattner]

> URL: http://llvm.org/viewvc/llvm-project?rev=37893&view=rev
> Log:
> PPC conditional branch predicate does not change after isel.
>
> Modified:
>     llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ 
> PowerPC/PPCInstrInfo.td?rev=37893&r1=37892&r2=37893&view=diff
>
> ====================================================================== 
> ========
> --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Thu Jul  5  
> 02:09:50 2007
> @@ -272,7 +272,8 @@
>
>  // PowerPC Predicate operand.  20 = (0<<5)|20 = always, CR0 is a  
> dummy reg
>  // that doesn't matter.
> -def pred : PredicateOperand<OtherVT, (ops imm, CRRC), (ops (i32  
> 20), CR0)> {
> +def pred : ImmutablePredicateOperand<OtherVT, (ops imm, CRRC),
> +                                              (ops (i32 20), CR0)> {

Would it make sense and be safe to change CR0 -> zeroreg?

-Chris