[llvm-commits] [llvm] r37897 - /llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td

[Evan Cheng]

Author: evancheng
Date: Thu Jul  5 02:17:13 2007
New Revision: 37897

URL: http://llvm.org/viewvc/llvm-project?rev=37897&view=rev
Log:
Added ARM::CPSR to represent ARM CPSR status register.

Modified:
    llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=37897&r1=37896&r2=37897&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Thu Jul  5 02:17:13 2007
@@ -78,6 +78,9 @@
 def D14 : ARMReg<14, "d14", [S28, S29]>;
 def D15 : ARMReg<15, "d15", [S30, S31]>;
 
+// Current Program Status Register.
+def CPSR : ARMReg<0, "cpsr">;
+
 // Register classes.
 //
 // pc  == Program Counter
@@ -188,3 +191,6 @@
 // is double-word alignment though.
 def DPR : RegisterClass<"ARM", [f64], 64, [D0, D1, D2, D3, D4, D5, D6, D7, D8,
   D9, D10, D11, D12, D13, D14, D15]>;
+
+// Condition code registers.
+def CCR : RegisterClass<"ARM", [i32], 32, [CPSR]>;