[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.415 -> 1.416
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Log message:

Type of vector extract / insert index operand should be iPTR.

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Diffs of the changes:  (+1 -1)

 X86ISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.415 llvm/lib/Target/X86/X86ISelLowering.cpp:1.416
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.415	Mon Jun 25 11:23:39 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Jun 28 19:01:20 2007
@@ -2959,7 +2959,7 @@
     if (N1.getValueType() != MVT::i32)
       N1 = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, N1);
     if (N2.getValueType() != MVT::i32)
-      N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(), MVT::i32);
+      N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(),getPointerTy());
     return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2);
   } else if (MVT::getSizeInBits(BaseVT) == 32) {
     unsigned Idx = cast<ConstantSDNode>(N2)->getValue();