[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrFPStack.td X86InstrInfo.cpp X86InstrInfo.h X86InstrInfo.td X86InstrMMX.td X86InstrSSE.td
christopher.lamb at gmail.com
Tue Jun 19 14:39:01 PDT 2007
On Jun 19, 2007, at 10:31 AM, Chris Lattner wrote:
>>> It seems that simple remat works for things that:
>>> 1. have no side effects
>>> 2. have no register inputs
>>> Is there another condition?
>> Can't think of any.
>>> If so, simple remat can check #2 today, just by itself looking at
>>> machineinstr. Given that, it comes down to how we want to
>>> represent #1.
>> I don't see a better way so I guess this will be a targetinstrinfo
>> bit (true for those with side-effects).
> Okay, the tricky thing here is instructions that have "conditional
> side effects". For example, all instructions marked isload/isstore/
> iscall etc should be considered to have side effects (as would
> anything with implicit definitions), but loads from constant pools
> and other special cases should not be considered to have side effects.
And on some specialized architectures there are other types of loads/
stores that are not side affecting as well. It would be good to have
this be open to customization.
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