[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

[Dan Gohman]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.131 -> 1.132
---
Log message:

Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.


---
Diffs of the changes:  (+4 -12)

 TargetInstrInfo.h |   16 ++++------------
 1 files changed, 4 insertions(+), 12 deletions(-)


Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.131 llvm/include/llvm/Target/TargetInstrInfo.h:1.132
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.131	Mon Jun 18 20:21:41 2007
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Mon Jun 18 20:48:04 2007
@@ -78,10 +78,6 @@
 // controls execution. It may be set to 'always'.
 const unsigned M_PREDICABLE = 1 << 12;
 
-// M_REMATERIALIZIBLE - Set if this instruction can be trivally re-materialized
-// at any time, e.g. constant generation, load from constant pool.
-const unsigned M_REMATERIALIZIBLE = 1 << 13;
-
 // M_CLOBBERS_PRED - Set if this instruction may clobbers the condition code
 // register and / or registers that are used to predicate instructions.
 const unsigned M_CLOBBERS_PRED = 1 << 14;
@@ -264,10 +260,6 @@
     return get(Opcode).Flags & M_PREDICABLE;
   }
 
-  bool isReMaterializable(MachineOpCode Opcode) const {
-    return get(Opcode).Flags & M_REMATERIALIZIBLE;
-  }
-
   bool clobbersPredicate(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_CLOBBERS_PRED;
   }
@@ -309,13 +301,13 @@
     return 0;
   }
 
-  /// isOtherReMaterializableLoad - If the specified machine instruction is a
-  /// direct load that is trivially rematerializable, not counting loads from
-  /// stack slots, return true. If not, return false.  This predicate must
+  /// isTriviallyReMaterializable - If the specified machine instruction can
+  /// be trivally re-materialized  at any time, e.g. constant generation or
+  /// loads from constant pools. If not, return false.  This predicate must
   /// return false if the instruction has any side effects other than
   /// producing the value from the load, or if it requres any address
   /// registers that are not always available.
-  virtual bool isOtherReMaterializableLoad(MachineInstr *MI) const {
+  virtual bool isTriviallyReMaterializable(MachineInstr *MI) const {
     return false;
   }