[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.272 -> 1.273
---
Log message:

If a function is vararg, never pass inreg arguments in registers.  Thanks to
Anton for half of this patch.




---
Diffs of the changes:  (+2 -1)

 PPCISelLowering.cpp |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.272 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.273
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.272	Thu Jun 14 17:58:02 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Mon Jun 18 19:13:10 2007
@@ -1830,7 +1830,8 @@
 static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, TargetMachine &TM) {
   SmallVector<CCValAssign, 16> RVLocs;
   unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv();
-  CCState CCInfo(CC, TM, RVLocs);
+  bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
+  CCState CCInfo(CC, isVarArg, TM, RVLocs);
   CCInfo.AnalyzeReturn(Op.Val, RetCC_PPC);
   
   // If this is the first return lowered for this function, add the regs to the