[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.cpp ARMInstrInfo.h

[Evan Cheng]

Geeze. I was sure I would've been yelled at had I made it into a  
targetinstrinfo bit. :-)

Really didn't want to go with either approach. But I don't see a  
better alternative.

Evan

On Jun 15, 2007, at 2:37 PM, Chris Lattner wrote:

> On Jun 15, 2007, at 2:15 PM, Evan Cheng wrote:
>> Instructions with unique labels or embedded jumptables cannot be
>> duplicated during ifcvt.
>
> Please turn this into a targetinstrinfo bit.  Virtual methods should
> only be used for properties whose behavior is a property of the
> *operands* of the instruction in combination with the opcode.  This
> property seems to only depend on the opcode.
>
> -Chris
>
>> ---
>> Diffs of the changes:  (+31 -0)
>>
>>  ARMInstrInfo.cpp |   29 +++++++++++++++++++++++++++++
>>  ARMInstrInfo.h   |    2 ++
>>  2 files changed, 31 insertions(+)
>>
>>
>> Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
>> diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.36 llvm/lib/Target/
>> ARM/ARMInstrInfo.cpp:1.37
>> --- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.36	Wed Jun 13 12:59:52  
>> 2007
>> +++ llvm/lib/Target/ARM/ARMInstrInfo.cpp	Fri Jun 15 16:15:00 2007
>> @@ -446,6 +446,35 @@
>>    return PIdx != -1 && MI->getOperand(PIdx).getImmedValue() !=
>> ARMCC::AL;
>>  }
>>
>> +bool ARMInstrInfo::CanBeDuplicated(const MachineInstr *MI) const {
>> +  switch (MI->getOpcode()) {
>> +  default: return true;
>> +  // These have unique labels.
>> +  case ARM::PICADD:
>> +  case ARM::PICLD:
>> +  case ARM::PICLDZH:
>> +  case ARM::PICLDZB:
>> +  case ARM::PICLDH:
>> +  case ARM::PICLDB:
>> +  case ARM::PICLDSH:
>> +  case ARM::PICLDSB:
>> +  case ARM::PICSTR:
>> +  case ARM::PICSTRH:
>> +  case ARM::PICSTRB:
>> +  case ARM::LEApcrel:
>> +  case ARM::LEApcrelJT:
>> +  case ARM::tPICADD:
>> +  case ARM::tLEApcrel:
>> +  case ARM::tLEApcrelJT:
>> +  case ARM::CONSTPOOL_ENTRY:
>> +  // These embed jumptables.
>> +  case ARM::BR_JTr:
>> +  case ARM::BR_JTm:
>> +  case ARM::BR_JTadd:
>> +    return false;
>> +  }
>> +}
>> +
>>  bool ARMInstrInfo::PredicateInstruction(MachineInstr *MI,
>>                                  const std::vector<MachineOperand>
>> &Pred) const {
>>    unsigned Opc = MI->getOpcode();
>>
>>
>> Index: llvm/lib/Target/ARM/ARMInstrInfo.h
>> diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.13 llvm/lib/Target/ARM/
>> ARMInstrInfo.h:1.14
>> --- llvm/lib/Target/ARM/ARMInstrInfo.h:1.13	Tue May 29 13:42:18 2007
>> +++ llvm/lib/Target/ARM/ARMInstrInfo.h	Fri Jun 15 16:15:00 2007
>> @@ -106,6 +106,8 @@
>>    // Predication support.
>>    virtual bool isPredicated(const MachineInstr *MI) const;
>>
>> +  virtual bool CanBeDuplicated(const MachineInstr *MI) const;
>> +
>>    virtual
>>    bool PredicateInstruction(MachineInstr *MI,
>>                              const std::vector<MachineOperand>
>> &Pred) const;
>>
>>
>>
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