[llvm-commits] CVS: llvm-www/pubs/2006-09-SOC-Synthesis.html 2006-09-SOC-Synthesis.pdf index.html

Wed Jun 13 17:57:12 PDT 2007

Changes in directory llvm-www/pubs:

2006-09-SOC-Synthesis.html added (r1.1)
2006-09-SOC-Synthesis.pdf added (r1.1)
index.html updated: 1.52 -> 1.53
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Log message:

add another paper


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Diffs of the changes:  (+60 -0)

 2006-09-SOC-Synthesis.html |   57 +++++++++++++++++++++++++++++++++++++++++++++
 2006-09-SOC-Synthesis.pdf  |    0 
 index.html                 |    3 ++
 3 files changed, 60 insertions(+)


Index: llvm-www/pubs/2006-09-SOC-Synthesis.html
diff -c /dev/null llvm-www/pubs/2006-09-SOC-Synthesis.html:1.1
*** /dev/null	Wed Jun 13 19:57:03 2007

--- llvm-www/pubs/2006-09-SOC-Synthesis.html	Wed Jun 13 19:56:53 2007
***************
*** 0 ****
--- 1,57 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
+   <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen" />
+   <title>Platform-Based Behavior-Level and System-Level Synthesis</title>
+ </head>
+ 
+ <body>
+ 
+ <div class="pub_title">
+ Platform-Based Behavior-Level and System-Level Synthesis
+ </div>
+ 
+ <div class="pub_author">
+   J. Cong, Y. Fan, G. Han, W. Jiang, and Z. Zhang
+ </div>
+ 
+ <h2>Abstract:</h2>
+ <blockquote>
+ With the rapid increase of complexity in System-on-a-Chip (SoC) design,
+ the electronic design automation (EDA) 
+ community is moving from RTL (Register Transfer Level) 
+ synthesis to behavioral-level and system-level synthesis. The 
+ needs of system-level verification and software/hardware co- 
+ design also prefer behavior-level executable specifications, such 
+ as C or SystemC. In this paper we present the platform-based 
+ synthesis system, named xPilot, being developed at UCLA. The 
+ first objective of xPilot is to provide novel behavioral synthesis 
+ capability for automatically generating efficient RTL code from 
+ a C or SystemC description for a given system platform and 
+ optimizing the logic, interconnects, performance, and power 
+ simultaneously. The second objective of xPilot is to provide a 
+ platform-based system-level synthesis capability, including both 
+ synthesis for application-specific configurable processors and 
+ heterogeneous multi-core systems. Preliminary experiments on 
+ FPGAs demonstrate the efficacy of our approach on a wide range 
+ of applications and its value in exploring various design tradeoffs. 
+ 
+ </blockquote>
+ 
+ <h2>Published:</h2>
+ <blockquote>
+ "Platform-Based Behavior-Level and System-Level Synthesis"<br>
+ J. Cong, Y. Fan, G. Han, W. Jiang, and Z. Zhang<br>
+ <i>Proceedings of IEEE International SOC Conference</i>, pp. 199-202, Austin, Texas, Sept. 2006.
+ </blockquote>
+ 
+ <h2>Download:</h2>
+ <ul>
+   <li><a href="2006-09-SOC-Synthesis.pdf">Platform-Based Behavior-Level and
+    System-Level Synthesis</a> (PDF)</li>
+ </ul>
+ 
+ 
+ </body>
+ </html>


Index: llvm-www/pubs/2006-09-SOC-Synthesis.pdf


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.52 llvm-www/pubs/index.html:1.53
--- llvm-www/pubs/index.html:1.52	Wed Jun 13 19:48:37 2007
+++ llvm-www/pubs/index.html	Wed Jun 13 19:56:53 2007
@@ -46,6 +46,9 @@
  <i>IFIP International Conference on Network and Parallel Computing</i>, Tokyo, 
  Japan, October, 2006.</li>
 
+<li>"<a href="2006-09-SOC-Synthesis.html">Platform-Based Behavior-Level and System-Level Synthesis</a>"<br>
+J. Cong, Y. Fan, G. Han, W. Jiang, and Z. Zhang<br>
+<i>Proceedings of IEEE International SOC Conference</i>, pp. 199-202, Austin, Texas, Sept. 2006.</li>
 
 <li>"<a href="2006-06-18-WIOSCA-LLVAOS.html">A Virtual Instruction Set Interface for Operating System Kernels</a>"<br>John Criswell, Brent Monroe, and Vikram Adve.<br><i>
 Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA '06)</i>, Boston, Massachusetts, 2006.<br></li>




