[llvm-commits] [127736] Minor cleanups, get this compiling again

[clattner at apple.com]

Revision: 127736
Author:   clattner
Date:     2007-05-27 09:01:01 -0700 (Sun, 27 May 2007)

Log Message:
-----------
Minor cleanups, get this compiling again

Modified Paths:
--------------
     apple-local/branches/llvm/gcc/config/rs6000/llvm-rs6000.cpp

Modified: apple-local/branches/llvm/gcc/config/rs6000/llvm-rs6000.cpp
===================================================================
--- apple-local/branches/llvm/gcc/config/rs6000/llvm-rs6000.cpp	 
2007-05-27 15:51:11 UTC (rev 127735)
+++ apple-local/branches/llvm/gcc/config/rs6000/llvm-rs6000.cpp	 
2007-05-27 16:01:01 UTC (rev 127736)
@@ -139,7 +139,7 @@
      MergeIntPtrOperand(this, 0, Intrinsic::ppc_altivec_lvehx,
                         ResultType, Ops, Builder, Result);
      return true;
-  case ALTIVEC_BUILTIN_LVEWX: {
+  case ALTIVEC_BUILTIN_LVEWX:
      MergeIntPtrOperand(this, 0, Intrinsic::ppc_altivec_lvewx,
                         ResultType, Ops, Builder, Result);
      return true;
@@ -155,7 +155,7 @@
      MergeIntPtrOperand(this, 1, Intrinsic::ppc_altivec_stvehx,
                         ResultType, Ops, Builder, Result);
      return true;
-  case ALTIVEC_BUILTIN_STVEWX: {
+  case ALTIVEC_BUILTIN_STVEWX:
      MergeIntPtrOperand(this, 1, Intrinsic::ppc_altivec_stvewx,
                         ResultType, Ops, Builder, Result);
      return true;
@@ -229,8 +229,8 @@
        /* Map all of these to a shuffle. */
        unsigned Amt = Elt->getZExtValue() & 15;
        VectorType *v16i8 = VectorType::get(Type::Int8Ty, 16);
-      Ops[0] = Builder.CreateBitCast(Op0, v16i8, "tmp");
-      Ops[1] = Builder.CreateBitCast(Op1, v16i8, "tmp");
+      Ops[0] = Builder.CreateBitCast(Ops[0], v16i8, "tmp");
+      Ops[1] = Builder.CreateBitCast(Ops[1], v16i8, "tmp");
        Result = BuildVectorShuffle(Ops[0], Ops[1],
                                    Amt, Amt+1, Amt+2, Amt+3,
                                    Amt+4, Amt+5, Amt+6, Amt+7,
@@ -241,23 +241,17 @@
        Result = Ops[0];
      }
      return true;
-  case ALTIVEC_BUILTIN_VPKUHUM: {
-    Value *Op0 = Ops[0];
-    Ops[0] = Builder.CreateBitCast(Op0, ResultType, Op0->getName 
().c_str());
-    Value *Op1 = Ops[1];
-    Ops[1] = Builder.CreateBitCast(Op1, ResultType, Op1->getName 
().c_str());
+  case ALTIVEC_BUILTIN_VPKUHUM:
+    Ops[0] = Builder.CreateBitCast(Ops[0], ResultType, "tmp");
+    Ops[1] = Builder.CreateBitCast(Ops[1], ResultType, "tmp");
      Result = BuildVectorShuffle(Ops[0], Ops[1], 1, 3, 5, 7, 9, 11,  
13, 15,
                                  17, 19, 21, 23, 25, 27, 29, 31);
      return true;
-  }
-  case ALTIVEC_BUILTIN_VPKUWUM: {
-    Value *Op0 = Ops[0];
-    Ops[0] = Builder.CreateBitCast(Op0, ResultType, Op0->getName 
().c_str());
-    Value *Op1 = Ops[1];
-    Ops[1] = Builder.CreateBitCast(Op1, ResultType, Op1->getName());
+  case ALTIVEC_BUILTIN_VPKUWUM:
+    Ops[0] = Builder.CreateBitCast(Ops[0], ResultType, "tmp");
+    Ops[1] = Builder.CreateBitCast(Ops[1], ResultType, "tmp");
      Result = BuildVectorShuffle(Ops[0], Ops[1], 1, 3, 5, 7, 9, 11,  
13, 15);
      return true;
-  }
    case ALTIVEC_BUILTIN_VMRGHB:
      Result = BuildVectorShuffle(Ops[0], Ops[1],
                                  0, 16, 1, 17, 2, 18, 3, 19,
@@ -295,7 +289,7 @@
    case ALTIVEC_BUILTIN_ABS_V16QI: { // iabs(x) -> smax(x, 0-x)
      Result = Builder.CreateNeg(Ops[0], "tmp");
      // get the right smax intrinsic.
-    static const unsigned smax_iid[3] = {
+    static const Intrinsic::ID smax_iid[3] = {
        Intrinsic::ppc_altivec_vmaxsw,
        Intrinsic::ppc_altivec_vmaxsh,
        Intrinsic::ppc_altivec_vmaxsb
@@ -310,18 +304,17 @@
    case ALTIVEC_BUILTIN_ABSS_V8HI:
    case ALTIVEC_BUILTIN_ABSS_V16QI: { // iabss(x) -> smax(x, satsub 
(0,x))
      // get the right smax/subs intrinsics.
-    static const unsigned smax_iid[3] = {
+    static const Intrinsic::ID smax_iid[3] = {
        Intrinsic::ppc_altivec_vmaxsw,
        Intrinsic::ppc_altivec_vmaxsh,
        Intrinsic::ppc_altivec_vmaxsb
      };
-    static const unsigned subss_iid[3] = {
+    static const Intrinsic::ID subss_iid[3] = {
        Intrinsic::ppc_altivec_vsubsws,
        Intrinsic::ppc_altivec_vsubshs,
        Intrinsic::ppc_altivec_vsubsbs
      };

-    static Constant *sxs[3], *smax[3];
      // get the right satsub intrinsic.
      const VectorType *PTy = cast<VectorType>(ResultType);
      unsigned N = GetAltivecTypeNumFromType(PTy->getElementType());