[llvm-commits] CVS: llvm/lib/Target/X86/X86.td
Bill Wendling
isanbard at gmail.com
Mon May 21 22:15:57 PDT 2007
Changes in directory llvm/lib/Target/X86:
X86.td updated: 1.33 -> 1.34
---
Log message:
We only need to specify the most-implied feature for an architecture.
---
Diffs of the changes: (+21 -33)
X86.td | 54 +++++++++++++++++++++---------------------------------
1 files changed, 21 insertions(+), 33 deletions(-)
Index: llvm/lib/Target/X86/X86.td
diff -u llvm/lib/Target/X86/X86.td:1.33 llvm/lib/Target/X86/X86.td:1.34
--- llvm/lib/Target/X86/X86.td:1.33 Sun May 6 02:56:19 2007
+++ llvm/lib/Target/X86/X86.td Tue May 22 00:15:37 2007
@@ -41,7 +41,7 @@
[Feature3DNow]>;
def Feature64Bit : SubtargetFeature<"64bit", "HasX86_64", "true",
"Support 64-bit instructions",
- [FeatureMMX, FeatureSSE1, FeatureSSE2]>;
+ [FeatureSSE2]>;
//===----------------------------------------------------------------------===//
// X86 processors supported.
@@ -58,44 +58,32 @@
def : Proc<"i686", []>;
def : Proc<"pentiumpro", []>;
def : Proc<"pentium2", [FeatureMMX]>;
-def : Proc<"pentium3", [FeatureMMX, FeatureSSE1]>;
-def : Proc<"pentium-m", [FeatureMMX, FeatureSSE1, FeatureSSE2]>;
-def : Proc<"pentium4", [FeatureMMX, FeatureSSE1, FeatureSSE2]>;
-def : Proc<"x86-64", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- Feature64Bit]>;
-def : Proc<"yonah", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- FeatureSSE3]>;
-def : Proc<"prescott", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- FeatureSSE3]>;
-def : Proc<"nocona", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- FeatureSSE3, Feature64Bit]>;
-def : Proc<"core2", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- FeatureSSE3, FeatureSSSE3, Feature64Bit]>;
+def : Proc<"pentium3", [FeatureSSE1]>;
+def : Proc<"pentium-m", [FeatureSSE2]>;
+def : Proc<"pentium4", [FeatureSSE2]>;
+def : Proc<"x86-64", [Feature64Bit]>;
+def : Proc<"yonah", [FeatureSSE3]>;
+def : Proc<"prescott", [FeatureSSE3]>;
+def : Proc<"nocona", [FeatureSSE3]>;
+def : Proc<"core2", [FeatureSSSE3]>;
def : Proc<"k6", [FeatureMMX]>;
-def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>;
-def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>;
-def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>;
-def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNow, Feature3DNowA]>;
-def : Proc<"athlon-4", [FeatureMMX, FeatureSSE1, Feature3DNow,
- Feature3DNowA]>;
-def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE1, Feature3DNow,
- Feature3DNowA]>;
-def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE1, Feature3DNow,
- Feature3DNowA]>;
-def : Proc<"k8", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- Feature3DNow, Feature3DNowA, Feature64Bit]>;
-def : Proc<"opteron", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- Feature3DNow, Feature3DNowA, Feature64Bit]>;
-def : Proc<"athlon64", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- Feature3DNow, Feature3DNowA, Feature64Bit]>;
-def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- Feature3DNow, Feature3DNowA, Feature64Bit]>;
+def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>;
+def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>;
+def : Proc<"athlon", [FeatureMMX, Feature3DNowA]>;
+def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNowA]>;
+def : Proc<"athlon-4", [FeatureSSE1, Feature3DNowA]>;
+def : Proc<"athlon-xp", [FeatureSSE1, Feature3DNowA]>;
+def : Proc<"athlon-mp", [FeatureSSE1, Feature3DNowA]>;
+def : Proc<"k8", [Feature3DNowA, Feature64Bit]>;
+def : Proc<"opteron", [Feature3DNowA, Feature64Bit]>;
+def : Proc<"athlon64", [Feature3DNowA, Feature64Bit]>;
+def : Proc<"athlon-fx", [Feature3DNowA, Feature64Bit]>;
def : Proc<"winchip-c6", [FeatureMMX]>;
def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>;
def : Proc<"c3", [FeatureMMX, Feature3DNow]>;
-def : Proc<"c3-2", [FeatureMMX, FeatureSSE1]>;
+def : Proc<"c3-2", [FeatureSSE1]>;
//===----------------------------------------------------------------------===//
// Register File Description
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