[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

[Dan Gohman]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.270 -> 1.271
---
Log message:

Apply this patch:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html


---
Diffs of the changes:  (+1 -1)

 PPCISelLowering.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.270 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.271
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.270	Mon May 14 20:31:05 2007
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri May 18 18:21:46 2007
@@ -222,7 +222,7 @@
     // First set operation action for all vector types to expand. Then we
     // will selectively turn on ones that can be effectively codegen'd.
     for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
-         VT != (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) {
+         VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) {
       // add/sub are legal for all supported vector VT's.
       setOperationAction(ISD::ADD , (MVT::ValueType)VT, Legal);
       setOperationAction(ISD::SUB , (MVT::ValueType)VT, Legal);