[llvm-commits] CVS: llvm/lib/Target/Target.td

[Evan Cheng]

Changes in directory llvm/lib/Target:

Target.td updated: 1.100 -> 1.101
---
Log message:

Added isPredicable bit to class Instruction.

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Diffs of the changes:  (+1 -0)

 Target.td |    1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.100 llvm/lib/Target/Target.td:1.101
--- llvm/lib/Target/Target.td:1.100	Tue May  8 16:05:24 2007
+++ llvm/lib/Target/Target.td	Wed May 16 15:47:01 2007
@@ -183,6 +183,7 @@
   bit isCommutable = 0;     // Is this 3 operand instruction commutable?
   bit isTerminator = 0;     // Is this part of the terminator for a basic block?
   bit isReMaterializable = 0; // Is this instruction re-materializable?
+  bit isPredicable = 0;     // Is this instruction predicable?
   bit hasDelaySlot = 0;     // Does this instruction have an delay slot?
   bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
   bit hasCtrlDep   = 0;     // Does this instruction r/w ctrl-flow chains?