[llvm-commits] Regalloc Refactoring

[Chris Lattner]

On May 9, 2007, at 4:54 PM, David A. Greene wrote:

> Evan Cheng wrote:
>> Hi,
>>
>> The patch seems pretty safe to me. The only thing I am not sure  
>> about is:
>
> [snip]
>
>> It's not clear to me if this is the right way to model this pass.  
>> After
>> all, this is not an analysis pass. Perhaps the right thing to do  
>> is to
>> model this after the register allocator. Add a  
>> createRegisterCoalescer()
>> to Passes.cpp which would allow us to choose the one we want. Then
>> register the pass in LLVMTargetMachine.cpp. Chris? What do you say?
>
> Yeah, I wasn't sure about that either.  I modeled it after the way  
> that
> out-of-ssa conversion is done since LinearScan assumes that coalescing
> has been done.
>
> I think your suggestion of createRegisterCoalescer() is the right
> solution in the long run.  My goal here was to submit the first phase
> of a larger refactoring effort that separated coalescing from
> live interval analysis but tried not to do anything else dramatic.

I think this part of the patch is right-minded.  I took a quick look  
at the patch and it looks good to me!

-Chris