[llvm-commits] CVS: llvm/lib/Target/X86/X86.td

[Bill Wendling]

Changes in directory llvm/lib/Target/X86:

X86.td updated: 1.32 -> 1.33
---
Log message:

3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX.


---
Diffs of the changes:  (+5 -3)

 X86.td |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/X86/X86.td
diff -u llvm/lib/Target/X86/X86.td:1.32 llvm/lib/Target/X86/X86.td:1.33
--- llvm/lib/Target/X86/X86.td:1.32	Fri May  4 15:38:40 2007
+++ llvm/lib/Target/X86/X86.td	Sun May  6 02:56:19 2007
@@ -20,8 +20,6 @@
 // X86 Subtarget features.
 //===----------------------------------------------------------------------===//
  
-def Feature64Bit   : SubtargetFeature<"64bit", "HasX86_64", "true",
-                                      "Support 64-bit instructions">;
 def FeatureMMX     : SubtargetFeature<"mmx","X86SSELevel", "MMX",
                                       "Enable MMX instructions">;
 def FeatureSSE1    : SubtargetFeature<"sse", "X86SSELevel", "SSE1",
@@ -39,7 +37,11 @@
 def Feature3DNow   : SubtargetFeature<"3dnow", "X863DNowLevel", "ThreeDNow",
                                       "Enable 3DNow! instructions">;
 def Feature3DNowA  : SubtargetFeature<"3dnowa", "X863DNowLevel", "ThreeDNowA",
-                                      "Enable 3DNow! Athlon instructions">;
+                                      "Enable 3DNow! Athlon instructions",
+                                      [Feature3DNow]>;
+def Feature64Bit   : SubtargetFeature<"64bit", "HasX86_64", "true",
+                                      "Support 64-bit instructions",
+                                      [FeatureMMX, FeatureSSE1, FeatureSSE2]>;
 
 //===----------------------------------------------------------------------===//
 // X86 processors supported.