[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Evan Cheng]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.298 -> 1.299
---
Log message:

Don't create indexed load / store with zero offset!

---
Diffs of the changes:  (+8 -0)

 DAGCombiner.cpp |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.299
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298	Tue May  1 03:53:39 2007
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu May  3 18:52:19 2007
@@ -3110,6 +3110,10 @@
   ISD::MemIndexedMode AM = ISD::UNINDEXED;
   if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG))
     return false;
+  // Don't create a indexed load / store with zero offset.
+  if (isa<ConstantSDNode>(Offset) &&
+      cast<ConstantSDNode>(Offset)->getValue() == 0)
+    return false;
   
   // Try turning it into a pre-indexed load / store except when:
   // 1) The base is a frame index.
@@ -3239,6 +3243,10 @@
         std::swap(BasePtr, Offset);
       if (Ptr != BasePtr)
         continue;
+      // Don't create a indexed load / store with zero offset.
+      if (isa<ConstantSDNode>(Offset) &&
+          cast<ConstantSDNode>(Offset)->getValue() == 0)
+        continue;
 
       // Try turning it into a post-indexed load / store except when
       // 1) All uses are load / store ops that use it as base ptr.