[llvm-commits] CVS: llvm/lib/Target/Target.td

[Nate Begeman]

Changes in directory llvm/lib/Target:

Target.td updated: 1.96 -> 1.97
---
Log message:

llvm bug #1350, parts 1, 2, and 3.


---
Diffs of the changes:  (+9 -7)

 Target.td |   16 +++++++++-------
 1 files changed, 9 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.96 llvm/lib/Target/Target.td:1.97
--- llvm/lib/Target/Target.td:1.96	Fri Apr 20 16:13:46 2007
+++ llvm/lib/Target/Target.td	Tue May  1 00:57:02 2007
@@ -67,13 +67,15 @@
   let SubRegs = subregs;
 }
 
-// RegisterGroup - This can be used to define instances of Register which
-// need to specify aliases.
-// List "aliases" specifies which registers are aliased to this one.  This
-// allows the code generator to be careful not to put two values with 
-// overlapping live ranges into registers which alias.
-class RegisterGroup<string n, list<Register> aliases> : Register<n> {
-  let Aliases = aliases;
+// SubRegSet - This can be used to define a specific mapping of registers to
+// indices, for use as named subregs of a particular physical register.  Each
+// register in 'subregs' becomes an addressable subregister at index 'n' of the
+// corresponding register in 'regs'.
+class SubRegSet<int n, list<Register> regs, list<Register> subregs> {
+  int index = n;
+  
+  list<Register> From = regs;
+  list<Register> To = subregs;
 }
 
 // RegisterClass - Now that all of the registers are defined, and aliases