[llvm-commits] CVS: llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll ispositive.ll vector-identity-shuffle.ll
Reid Spencer
reid at x10sys.com
Sun Apr 29 22:12:22 PDT 2007
Changes in directory llvm/test/CodeGen/PowerPC:
2006-11-10-DAGCombineMiscompile.ll added (r1.1)
ispositive.ll added (r1.1)
vector-identity-shuffle.ll added (r1.1)
---
Log message:
For PR1370: http://llvm.org/PR1370 :
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
---
Diffs of the changes: (+40 -0)
2006-11-10-DAGCombineMiscompile.ll | 14 ++++++++++++++
ispositive.ll | 10 ++++++++++
vector-identity-shuffle.ll | 16 ++++++++++++++++
3 files changed, 40 insertions(+)
Index: llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll:1.1
*** /dev/null Mon Apr 30 00:12:08 2007
--- llvm/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,14 ----
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi
+
+ void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) {
+ %X = shl short %div.0.i.i.i.i, ubyte 1 ; <short> [#uses=1]
+ %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; <int> [#uses=2]
+ %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; <bool> [#uses=2]
+
+ %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; <short> [#uses=1]
+ %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; <short> [#uses=1]
+ %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; <short> [#uses=1]
+ store short %div.0.be.i.i.i.i, short* %P
+ ret void
+ }
+
Index: llvm/test/CodeGen/PowerPC/ispositive.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/ispositive.ll:1.1
*** /dev/null Mon Apr 30 00:12:22 2007
--- llvm/test/CodeGen/PowerPC/ispositive.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,10 ----
+ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+ ; RUN: grep {srwi r3, r3, 31}
+
+ define i32 @test1(i32 %X) {
+ entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+ }
+
Index: llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll:1.1
*** /dev/null Mon Apr 30 00:12:22 2007
--- llvm/test/CodeGen/PowerPC/vector-identity-shuffle.ll Mon Apr 30 00:11:58 2007
***************
*** 0 ****
--- 1,16 ----
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
+ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
+
+ void %test(<4 x float> *%tmp2.i) {
+ %tmp2.i = load <4x float>* %tmp2.i
+ %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; <float> [#uses=1]
+ %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1]
+ %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; <float> [#uses=1]
+ %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1]
+ %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; <float> [#uses=1]
+ %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1]
+ %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; <float> [#uses=1]
+ %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4]
+ store <4 x float> %inFloat3.58, <4x float>* %tmp2.i
+ ret void
+ }
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