[llvm-commits] CVS: llvm/lib/Target/MRegisterInfo.cpp

[Chris Lattner]

>  MRegisterInfo::~MRegisterInfo() {}
>
> -BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF)  
> const {
> +BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF,
> +                                           const  
> TargetRegisterClass *RC) const {
>    BitVector Allocatable(NumRegs);
>    for (MRegisterInfo::regclass_iterator I = regclass_begin(),
>           E = regclass_end(); I != E; ++I) {
> +    const TargetRegisterClass *TRC = *I;
> +    if (RC && TRC != RC)
> +      continue;

If RC is specified, you should just scan it, instead of walking  
regclass_begin->end to find it.

-Chris

> +    for (TargetRegisterClass::iterator I = TRC- 
> >allocation_order_begin(MF),
> +           E = TRC->allocation_order_end(MF); I != E; ++I)
>        Allocatable.set(*I);
>    }
>    return Allocatable;
>
>
>
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