[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp TargetLowering.cpp

[Anton Korobeynikov]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAGSimple.cpp updated: 1.25 -> 1.26
TargetLowering.cpp updated: 1.108 -> 1.109
---
Log message:

Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.


---
Diffs of the changes:  (+23 -23)

 ScheduleDAGSimple.cpp |   42 +++++++++++++++++++++---------------------
 TargetLowering.cpp    |    4 ++--
 2 files changed, 23 insertions(+), 23 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.25 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.26
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.25	Sun Feb  4 02:47:20 2007
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp	Mon Apr 16 13:10:22 2007
@@ -288,9 +288,9 @@
                                         // Tally iterator 
   
   /// SlotsAvailable - Returns true if all units are available.
-	///
+  ///
   bool SlotsAvailable(Iter Begin, unsigned N, unsigned ResourceSet,
-                                              unsigned &Resource) {
+                      unsigned &Resource) {
     assert(N && "Must check availability with N != 0");
     // Determine end of interval
     Iter End = Begin + N;
@@ -318,23 +318,23 @@
     Resource = 0;
     return false;
   }
-	
-	/// RetrySlot - Finds a good candidate slot to retry search.
+  
+  /// RetrySlot - Finds a good candidate slot to retry search.
   Iter RetrySlot(Iter Begin, unsigned N, unsigned ResourceSet) {
     assert(N && "Must check availability with N != 0");
     // Determine end of interval
     Iter End = Begin + N;
     assert(End <= Tally.end() && "Tally is not large enough for schedule");
-		
-		while (Begin != End--) {
-			// Clear units in use
-			ResourceSet &= ~*End;
-			// If no units left then we should go no further 
-			if (!ResourceSet) return End + 1;
-		}
-		// Made it all the way through
-		return Begin;
-	}
+    
+    while (Begin != End--) {
+      // Clear units in use
+      ResourceSet &= ~*End;
+      // If no units left then we should go no further 
+      if (!ResourceSet) return End + 1;
+    }
+    // Made it all the way through
+    return Begin;
+  }
   
   /// FindAndReserveStages - Return true if the stages can be completed. If
   /// so mark as busy.
@@ -391,13 +391,13 @@
   // FindAndReserve - Locate an ideal slot for the specified stages and mark
   // as busy.
   unsigned FindAndReserve(unsigned Slot, InstrStage *StageBegin,
-                                         InstrStage *StageEnd) {
-		// Where to begin 
-		Iter Begin = Tally.begin() + Slot;
-		// Find a free slot
-		Iter Where = FindSlots(Begin, StageBegin, StageEnd);
-		// Distance is slot number
-		unsigned Final = Where - Tally.begin();
+                          InstrStage *StageEnd) {
+    // Where to begin 
+    Iter Begin = Tally.begin() + Slot;
+    // Find a free slot
+    Iter Where = FindSlots(Begin, StageBegin, StageEnd);
+    // Distance is slot number
+    unsigned Final = Where - Tally.begin();
     return Final;
   }
 


Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.108 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.109
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.108	Wed Apr 11 23:44:28 2007
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp	Mon Apr 16 13:10:22 2007
@@ -2150,7 +2150,7 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, 
-				    std::vector<SDNode*>* Created) const {
+                                    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.
@@ -2198,7 +2198,7 @@
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
-				    std::vector<SDNode*>* Created) const {
+                                    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.