[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h
Chris Lattner
sabre at nondot.org
Mon Apr 9 16:31:37 PDT 2007
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.387 -> 1.388
X86ISelLowering.h updated: 1.96 -> 1.97
---
Log message:
remove some dead hooks
---
Diffs of the changes: (+0 -49)
X86ISelLowering.cpp | 35 -----------------------------------
X86ISelLowering.h | 14 --------------
2 files changed, 49 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.387 llvm/lib/Target/X86/X86ISelLowering.cpp:1.388
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.387 Mon Apr 9 17:26:30 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Mon Apr 9 18:31:19 2007
@@ -4092,41 +4092,6 @@
}
-/// isLegalAddressImmediate - Return true if the integer value can be used
-/// as the offset of the target addressing mode for load / store of the
-/// given type.
-bool X86TargetLowering::isLegalAddressImmediate(int64_t V,const Type *Ty) const{
- // X86 allows a sign-extended 32-bit immediate field.
- return (V > -(1LL << 32) && V < (1LL << 32)-1);
-}
-
-/// isLegalAddressImmediate - Return true if the GlobalValue can be used as
-/// the offset of the target addressing mode.
-bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
- // In 64-bit mode, GV is 64-bit so it won't fit in the 32-bit displacement
- // field unless we are in small code model.
- if (Subtarget->is64Bit() &&
- getTargetMachine().getCodeModel() != CodeModel::Small)
- return false;
-
- return (!Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false));
-}
-
-/// isLegalAddressScale - Return true if the integer value can be used as the
-/// scale of the target addressing mode for load / store of the given type.
-bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
- switch (S) {
- default:
- return false;
- case 2: case 4: case 8:
- return true;
- // FIXME: These require both scale + index last and thus more expensive.
- // How to tell LSR to try for 2, 4, 8 first?
- case 3: case 5: case 9:
- return true;
- }
-}
-
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.96 llvm/lib/Target/X86/X86ISelLowering.h:1.97
--- llvm/lib/Target/X86/X86ISelLowering.h:1.96 Mon Apr 9 17:26:30 2007
+++ llvm/lib/Target/X86/X86ISelLowering.h Mon Apr 9 18:31:19 2007
@@ -339,20 +339,6 @@
/// by AM is legal for this target, for a load/store of the specified type.
virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const;
- /// isLegalAddressImmediate - Return true if the integer value can be used
- /// as the offset of the target addressing mode for load / store of the
- /// given type.
- virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const;
-
- /// isLegalAddressImmediate - Return true if the GlobalValue can be used as
- /// the offset of the target addressing mode.
- virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
-
- /// isLegalAddressScale - Return true if the integer value can be used as
- /// the scale of the target addressing mode for load / store of the given
- /// type.
- virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
-
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask
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