[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp VirtRegMap.h VirtRegMap.cpp
Evan Cheng
evan.cheng at apple.com
Wed Apr 4 00:40:18 PDT 2007
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.233 -> 1.234
VirtRegMap.h updated: 1.27 -> 1.28
VirtRegMap.cpp updated: 1.108 -> 1.109
---
Log message:
Re-materialize all loads from fixed stack slots.
---
Diffs of the changes: (+34 -15)
LiveIntervalAnalysis.cpp | 17 ++++++++++++-----
VirtRegMap.cpp | 24 ++++++++++++++++++------
VirtRegMap.h | 8 ++++----
3 files changed, 34 insertions(+), 15 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.233 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.234
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.233 Wed Apr 4 02:04:55 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Apr 4 02:40:01 2007
@@ -167,8 +167,10 @@
LiveInterval &RegInt = getInterval(reg);
float w = (mop.isUse()+mop.isDef()) * powf(10.0F, (float)loopDepth);
// If the definition instruction is re-materializable, its spill
- // weight is half of what it would have been normally.
- if (RegInt.remat)
+ // weight is half of what it would have been normally unless it's
+ // a load from fixed stack slot.
+ int Dummy;
+ if (RegInt.remat && !tii_->isLoadFromStackSlot(RegInt.remat, Dummy))
w /= 2;
RegInt.weight += w;
}
@@ -430,8 +432,13 @@
// done once for the vreg. We use an empty interval to detect the first
// time we see a vreg.
if (interval.empty()) {
- // Remember if the definition can be rematerialized.
- if (vi.DefInst && tii_->isReMaterializable(vi.DefInst->getOpcode()))
+ // Remember if the definition can be rematerialized. All load's from fixed
+ // stack slots are re-materializable.
+ int FrameIdx = 0;
+ if (vi.DefInst &&
+ (tii_->isReMaterializable(vi.DefInst->getOpcode()) ||
+ (tii_->isLoadFromStackSlot(vi.DefInst, FrameIdx) &&
+ mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx))))
interval.remat = vi.DefInst;
// Get the Idx of the defining instructions.
@@ -509,7 +516,7 @@
}
} else {
- // Can't safely assume definition is rematierializable anymore.
+ // Can no longer safely assume definition is rematerializable.
interval.remat = NULL;
// If this is the second time we see a virtual register definition, it
Index: llvm/lib/CodeGen/VirtRegMap.h
diff -u llvm/lib/CodeGen/VirtRegMap.h:1.27 llvm/lib/CodeGen/VirtRegMap.h:1.28
--- llvm/lib/CodeGen/VirtRegMap.h:1.27 Tue Mar 20 03:13:50 2007
+++ llvm/lib/CodeGen/VirtRegMap.h Wed Apr 4 02:40:01 2007
@@ -31,8 +31,8 @@
public:
enum {
NO_PHYS_REG = 0,
- NO_STACK_SLOT = ~0 >> 1,
- MAX_STACK_SLOT = (1 << 18)-1
+ NO_STACK_SLOT = (1L << 30)-1,
+ MAX_STACK_SLOT = (1L << 18)-1
};
enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
@@ -60,13 +60,13 @@
/// read/written by this instruction.
MI2VirtMapTy MI2VirtMap;
- /// ReMatMap - This is irtual register to re-materialized instruction
+ /// ReMatMap - This is virtual register to re-materialized instruction
/// mapping. Each virtual register whose definition is going to be
/// re-materialized has an entry in it.
std::map<unsigned, const MachineInstr*> ReMatMap;
/// ReMatId - Instead of assigning a stack slot to a to be rematerialized
- /// virtaul register, an unique id is being assinged. This keeps track of
+ /// virtual register, an unique id is being assigned. This keeps track of
/// the highest id used so far. Note, this starts at (1<<18) to avoid
/// conflicts with stack slot numbers.
int ReMatId;
Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.108 llvm/lib/CodeGen/VirtRegMap.cpp:1.109
--- llvm/lib/CodeGen/VirtRegMap.cpp:1.108 Fri Mar 30 15:21:35 2007
+++ llvm/lib/CodeGen/VirtRegMap.cpp Wed Apr 4 02:40:01 2007
@@ -87,6 +87,9 @@
assert(MRegisterInfo::isVirtualRegister(virtReg));
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign stack slot to already spilled register");
+ assert((frameIndex >= 0 ||
+ (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
+ "illegal fixed frame index");
Virt2StackSlotMap[virtReg] = frameIndex;
}
@@ -94,8 +97,14 @@
assert(MRegisterInfo::isVirtualRegister(virtReg));
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign re-mat id to already spilled register");
+ const MachineInstr *DefMI = getReMaterializedMI(virtReg);
+ int FrameIdx;
+ if (TII.isLoadFromStackSlot((MachineInstr*)DefMI, FrameIdx)) {
+ // Load from stack slot is re-materialize as reload from the stack slot!
+ Virt2StackSlotMap[virtReg] = FrameIdx;
+ return FrameIdx;
+ }
Virt2StackSlotMap[virtReg] = ReMatId;
- ++NumReMats;
return ReMatId++;
}
@@ -625,7 +634,6 @@
/// register allocator is done with them. If possible, avoid reloading vregs.
void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
std::vector<MachineInstr*> &ReMatedMIs) {
-
DOUT << MBB.getBasicBlock()->getName() << ":\n";
// Spills - Keep track of which spilled values are available in physregs so
@@ -656,7 +664,9 @@
const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
// If this instruction is being rematerialized, just remove it!
- if (TID->Flags & M_REMATERIALIZIBLE) {
+ int FrameIdx;
+ if ((TID->Flags & M_REMATERIALIZIBLE) ||
+ TII->isLoadFromStackSlot(&MI, FrameIdx)) {
bool Remove = true;
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
@@ -886,10 +896,13 @@
PhysRegsUsed[PhysReg] = true;
ReusedOperands.markClobbered(PhysReg);
- if (doReMat)
+ if (doReMat) {
MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
- else
+ ++NumReMats;
+ } else {
MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
+ ++NumLoads;
+ }
// This invalidates PhysReg.
Spills.ClobberPhysReg(PhysReg);
@@ -901,7 +914,6 @@
// unless it's a two-address operand.
if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
MI.getOperand(i).setIsKill();
- ++NumLoads;
MI.getOperand(i).setReg(PhysReg);
DOUT << '\t' << *prior(MII);
}
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