[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

[Anton Korobeynikov]

Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.146 -> 1.147
---
Log message:

Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.


---
Diffs of the changes:  (+14 -6)

 X86ISelDAGToDAG.cpp |   20 ++++++++++++++------
 1 files changed, 14 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.146 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.147
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.146	Tue Mar 20 01:08:29 2007
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Wed Mar 28 13:36:33 2007
@@ -140,7 +140,8 @@
   private:
     SDNode *Select(SDOperand N);
 
-    bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool isRoot = true);
+    bool MatchAddress(SDOperand N, X86ISelAddressMode &AM,
+                      bool isRoot = true,unsigned Depth = 0);
     bool SelectAddr(SDOperand Op, SDOperand N, SDOperand &Base,
                     SDOperand &Scale, SDOperand &Index, SDOperand &Disp);
     bool SelectLEAAddr(SDOperand Op, SDOperand N, SDOperand &Base,
@@ -561,7 +562,14 @@
 /// returning true if it cannot be done.  This just pattern matches for the
 /// addressing mode
 bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
-                                   bool isRoot) {
+                                   bool isRoot, unsigned Depth) {
+  if (Depth > 5) {
+    // Default, generate it as a register.
+    AM.BaseType = X86ISelAddressMode::RegBase;
+    AM.Base.Reg = N;
+    return false;
+  }
+  
   // RIP relative addressing: %rip + 32-bit displacement!
   if (AM.isRIPRel) {
     if (!AM.ES && AM.JT != -1 && N.getOpcode() == ISD::Constant) {
@@ -711,12 +719,12 @@
   case ISD::ADD:
     if (!Available) {
       X86ISelAddressMode Backup = AM;
-      if (!MatchAddress(N.Val->getOperand(0), AM, false) &&
-          !MatchAddress(N.Val->getOperand(1), AM, false))
+      if (!MatchAddress(N.Val->getOperand(0), AM, false, Depth+1) &&
+          !MatchAddress(N.Val->getOperand(1), AM, false, Depth+1))
         return false;
       AM = Backup;
-      if (!MatchAddress(N.Val->getOperand(1), AM, false) &&
-          !MatchAddress(N.Val->getOperand(0), AM, false))
+      if (!MatchAddress(N.Val->getOperand(1), AM, false, Depth+1) &&
+          !MatchAddress(N.Val->getOperand(0), AM, false, Depth+1))
         return false;
       AM = Backup;
     }