[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86InstrInfo.cpp updated: 1.80 -> 1.81
---
Log message:

Compile CodeGen/X86/lea-3.ll:test2 to:

_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret



---
Diffs of the changes:  (+13 -0)

 X86InstrInfo.cpp |   13 +++++++++++++
 1 files changed, 13 insertions(+)


Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.80 llvm/lib/Target/X86/X86InstrInfo.cpp:1.81
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.80	Tue Mar 27 19:58:40 2007
+++ llvm/lib/Target/X86/X86InstrInfo.cpp	Wed Mar 28 13:12:31 2007
@@ -149,6 +149,19 @@
     NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M);
     break;
   }
+  case X86::SHL64ri: {
+    assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
+    // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses
+    // the flags produced by a shift yet, so this is safe.
+    unsigned Dest = MI->getOperand(0).getReg();
+    unsigned Src = MI->getOperand(1).getReg();
+    unsigned ShAmt = MI->getOperand(2).getImm();
+    if (ShAmt == 0 || ShAmt >= 4) return 0;
+    
+    NewMI = BuildMI(get(X86::LEA64r), Dest)
+      .addReg(0).addImm(1 << ShAmt).addReg(Src).addImm(0);
+    break;
+  }
   case X86::SHL32ri: {
     assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
     // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses