[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.h ARMRegisterInfo.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/ARM:

ARMRegisterInfo.h updated: 1.16 -> 1.17
ARMRegisterInfo.cpp updated: 1.83 -> 1.84
---
Log message:

Added MRegisterInfo hook to re-materialize an instruction.

---
Diffs of the changes:  (+38 -16)

 ARMRegisterInfo.cpp |   51 +++++++++++++++++++++++++++++++++++----------------
 ARMRegisterInfo.h   |    3 +++
 2 files changed, 38 insertions(+), 16 deletions(-)


Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.16 llvm/lib/Target/ARM/ARMRegisterInfo.h:1.17
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.16	Tue Mar  6 04:03:56 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h	Tue Mar 20 03:07:04 2007
@@ -60,6 +60,9 @@
                     unsigned DestReg, unsigned SrcReg,
                     const TargetRegisterClass *RC) const;
 
+  void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+                     unsigned DestReg, const MachineInstr *Orig) const;
+
   MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
                                   int FrameIndex) const;
 


Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.83 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.84
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.83	Mon Mar 19 02:48:02 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp	Tue Mar 20 03:07:04 2007
@@ -195,6 +195,38 @@
     abort();
 }
 
+/// emitLoadConstPool - Emits a load from constpool to materialize the
+/// specified immediate.
+static void emitLoadConstPool(MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator &MBBI,
+                              unsigned DestReg, int Val, 
+                              const TargetInstrInfo &TII, bool isThumb) {
+  MachineFunction &MF = *MBB.getParent();
+  MachineConstantPool *ConstantPool = MF.getConstantPool();
+  Constant *C = ConstantInt::get(Type::Int32Ty, Val);
+  unsigned Idx = ConstantPool->getConstantPoolIndex(C, 2);
+  if (isThumb)
+    BuildMI(MBB, MBBI, TII.get(ARM::tLDRcp), DestReg).addConstantPoolIndex(Idx);
+  else
+    BuildMI(MBB, MBBI, TII.get(ARM::LDRcp), DestReg).addConstantPoolIndex(Idx)
+      .addReg(0).addImm(0);
+}
+
+void ARMRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+                                    MachineBasicBlock::iterator I,
+                                    unsigned DestReg,
+                                    const MachineInstr *Orig) const {
+  if (Orig->getOpcode() == ARM::MOVi2pieces) {
+    emitLoadConstPool(MBB, I, DestReg, Orig->getOperand(1).getImmedValue(),
+                      TII, false);
+    return;
+  }
+
+  MachineInstr *MI = Orig->clone();
+  MI->getOperand(0).setReg(DestReg);
+  MBB.insert(I, MI);
+}
+
 /// isLowRegister - Returns true if the register is low register r0-r7.
 ///
 static bool isLowRegister(unsigned Reg) {
@@ -410,19 +442,6 @@
   return NumMIs;
 }
 
-/// emitLoadConstPool - Emits a load from constpool to materialize NumBytes
-/// immediate.
-static void emitLoadConstPool(MachineBasicBlock &MBB,
-                              MachineBasicBlock::iterator &MBBI,
-                              unsigned DestReg, int NumBytes, 
-                              const TargetInstrInfo &TII) {
-  MachineFunction &MF = *MBB.getParent();
-  MachineConstantPool *ConstantPool = MF.getConstantPool();
-  Constant *C = ConstantInt::get(Type::Int32Ty, NumBytes);
-  unsigned Idx = ConstantPool->getConstantPoolIndex(C, 2);
-  BuildMI(MBB, MBBI, TII.get(ARM::tLDRpci), DestReg).addConstantPoolIndex(Idx);
-}
-
 /// emitThumbRegPlusImmInReg - Emits a series of instructions to materialize
 /// a destreg = basereg + immediate in Thumb code. Materialize the immediate
 /// in a register using mov / mvn sequences or load the immediate from a
@@ -459,7 +478,7 @@
       BuildMI(MBB, MBBI, TII.get(ARM::tNEG), LdReg)
         .addReg(LdReg, false, false, true);
     } else
-      emitLoadConstPool(MBB, MBBI, LdReg, NumBytes, TII);
+      emitLoadConstPool(MBB, MBBI, LdReg, NumBytes, TII, true);
 
     // Emit add / sub.
     int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr);
@@ -885,7 +904,7 @@
         if (FrameReg == ARM::SP)
           emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
         else {
-          emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
+          emitLoadConstPool(MBB, II, TmpReg, Offset, TII, true);
           UseRR = true;
         }
       } else
@@ -920,7 +939,7 @@
         if (FrameReg == ARM::SP)
           emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
         else {
-          emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
+          emitLoadConstPool(MBB, II, TmpReg, Offset, TII, true);
           UseRR = true;
         }
       } else