[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp
Anton Korobeynikov
asl at math.spbu.ru
Wed Mar 7 08:25:53 PST 2007
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.55 -> 1.56
---
Log message:
Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.
---
Diffs of the changes: (+4 -2)
IA64ISelLowering.cpp | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.55 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.56
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.55 Thu Feb 22 08:56:36 2007
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Wed Mar 7 10:25:09 2007
@@ -341,9 +341,11 @@
case MVT::i32: {
//promote to 64-bits, sign/zero extending based on type
//of the argument
- ISD::NodeType ExtendKind = ISD::ZERO_EXTEND;
- if (Args[i].isSigned)
+ ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
+ if (Args[i].isSExt)
ExtendKind = ISD::SIGN_EXTEND;
+ else if (Args[i].isZExt)
+ ExtendKind = ISD::ZERO_EXTEND;
Val = DAG.getNode(ExtendKind, MVT::i64, Val);
// XXX: fall through
}
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