[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMRegisterInfo.h ARMRegisterInfo.td

[Evan Cheng]

Changes in directory llvm/lib/Target/ARM:

ARMRegisterInfo.cpp updated: 1.74 -> 1.75
ARMRegisterInfo.h updated: 1.14 -> 1.15
ARMRegisterInfo.td updated: 1.12 -> 1.13
---
Log message:

Make requiresRegisterScavenging determination on a per MachineFunction basis.

---
Diffs of the changes:  (+13 -11)

 ARMRegisterInfo.cpp |    6 ++++--
 ARMRegisterInfo.h   |    2 +-
 ARMRegisterInfo.td  |   16 ++++++++--------
 3 files changed, 13 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.74 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.75
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.74	Tue Feb 27 18:21:58 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp	Tue Feb 27 18:59:19 2007
@@ -326,8 +326,10 @@
   return Reserved;
 }
 
-bool ARMRegisterInfo::requiresRegisterScavenging() const {
-  return EnableScavenging;
+bool
+ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
+  const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+  return EnableScavenging && !AFI->isThumbFunction();
 }
 
 /// hasFP - Return true if the specified function should have a dedicated frame


Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.14 llvm/lib/Target/ARM/ARMRegisterInfo.h:1.15
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.14	Tue Feb 27 18:21:17 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h	Tue Feb 27 18:59:19 2007
@@ -74,7 +74,7 @@
 
   BitVector getReservedRegs(const MachineFunction &MF) const;
 
-  bool requiresRegisterScavenging() const;
+  bool requiresRegisterScavenging(const MachineFunction &MF) const;
 
   bool hasFP(const MachineFunction &MF) const;
 


Index: llvm/lib/Target/ARM/ARMRegisterInfo.td
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.12 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.13
--- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.12	Tue Feb 27 18:22:44 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.td	Tue Feb 27 18:59:19 2007
@@ -163,14 +163,14 @@
         return THUMB_GPR_AO;
       if (Subtarget.useThumbBacktraces()) {
         if (Subtarget.isR9Reserved())
-          return RI->requiresRegisterScavenging() ? ARM_GPR_AO_8 : ARM_GPR_AO_4;
+          return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_8:ARM_GPR_AO_4;
         else
-          return RI->requiresRegisterScavenging() ? ARM_GPR_AO_7 : ARM_GPR_AO_3;
+          return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_7:ARM_GPR_AO_3;
       } else {
         if (Subtarget.isR9Reserved())
-          return RI->requiresRegisterScavenging() ? ARM_GPR_AO_6 : ARM_GPR_AO_2;
+          return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_6:ARM_GPR_AO_2;
         else
-          return RI->requiresRegisterScavenging() ? ARM_GPR_AO_5 : ARM_GPR_AO_1;
+          return RI->requiresRegisterScavenging(MF) ? ARM_GPR_AO_5:ARM_GPR_AO_1;
       }
     }
 
@@ -184,24 +184,24 @@
         I = THUMB_GPR_AO + (sizeof(THUMB_GPR_AO)/sizeof(unsigned));
       else if (Subtarget.useThumbBacktraces()) {
         if (Subtarget.isR9Reserved()) {
-          if (RI->requiresRegisterScavenging())
+          if (RI->requiresRegisterScavenging(MF))
             I = ARM_GPR_AO_8 + (sizeof(ARM_GPR_AO_8)/sizeof(unsigned));
           else
             I = ARM_GPR_AO_4 + (sizeof(ARM_GPR_AO_4)/sizeof(unsigned));
         } else {
-          if (RI->requiresRegisterScavenging())
+          if (RI->requiresRegisterScavenging(MF))
             I = ARM_GPR_AO_7 + (sizeof(ARM_GPR_AO_7)/sizeof(unsigned));
           else
             I = ARM_GPR_AO_3 + (sizeof(ARM_GPR_AO_3)/sizeof(unsigned));
         }
       } else {
         if (Subtarget.isR9Reserved()) {
-          if (RI->requiresRegisterScavenging())
+          if (RI->requiresRegisterScavenging(MF))
             I = ARM_GPR_AO_6 + (sizeof(ARM_GPR_AO_6)/sizeof(unsigned));
           else
             I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned));
         } else {
-          if (RI->requiresRegisterScavenging())
+          if (RI->requiresRegisterScavenging(MF))
             I = ARM_GPR_AO_5 + (sizeof(ARM_GPR_AO_5)/sizeof(unsigned));
           else
             I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned));