[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/ARM:

ARMRegisterInfo.cpp updated: 1.73 -> 1.74
---
Log message:

Start making use of RegScavenger.

---
Diffs of the changes:  (+12 -8)

 ARMRegisterInfo.cpp |   20 ++++++++++++--------
 1 files changed, 12 insertions(+), 8 deletions(-)


Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.73 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.74
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.73	Tue Feb 27 15:12:35 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp	Tue Feb 27 18:21:58 2007
@@ -85,17 +85,13 @@
   : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
     TII(tii), STI(sti),
     FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
-  RS = new RegScavenger();
+  RS = (EnableScavenging) ? new RegScavenger() : NULL;
 }
 
 ARMRegisterInfo::~ARMRegisterInfo() {
   delete RS;
 }
 
-RegScavenger *ARMRegisterInfo::getRegScavenger() const {
-  return EnableScavenging ? RS : NULL;
-}
-
 bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                                 MachineBasicBlock::iterator MI,
                                 const std::vector<CalleeSavedInfo> &CSI) const {
@@ -330,6 +326,10 @@
   return Reserved;
 }
 
+bool ARMRegisterInfo::requiresRegisterScavenging() const {
+  return EnableScavenging;
+}
+
 /// hasFP - Return true if the specified function should have a dedicated frame
 /// pointer register.  This is true if the function has variable sized allocas
 /// or if frame pointer elimination is disabled.
@@ -616,7 +616,8 @@
       .addReg(DestReg, false, false, true);
 }
 
-void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
+void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
+                                          RegScavenger *RS) const{
   unsigned i = 0;
   MachineInstr &MI = *II;
   MachineBasicBlock &MBB = *MI.getParent();
@@ -898,9 +899,12 @@
     // If the offset we have is too large to fit into the instruction, we need
     // to form it with a series of ADDri's.  Do this by taking 8-bit chunks
     // out of 'Offset'.
-    emitARMRegPlusImmediate(MBB, II, ARM::R12, FrameReg,
+    unsigned ScratchReg = RS
+      ? RS->FindUnusedReg(&ARM::GPRRegClass, true) : (unsigned)ARM::R12;
+    assert(ScratchReg != 0 && "Unable to find a free call-clobbered register!");
+    emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
                             isSub ? -Offset : Offset, TII);
-    MI.getOperand(i).ChangeToRegister(ARM::R12, false, false, true);
+    MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
   }
 }