[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Reid Spencer
reid at x10sys.com
Wed Feb 14 18:27:27 PST 2007
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.107 -> 1.108
---
Log message:
For PR1195: http://llvm.org/PR1195 :
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.
---
Diffs of the changes: (+4 -4)
TargetLowering.h | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.107 llvm/include/llvm/Target/TargetLowering.h:1.108
--- llvm/include/llvm/Target/TargetLowering.h:1.107 Thu Feb 8 16:13:59 2007
+++ llvm/include/llvm/Target/TargetLowering.h Wed Feb 14 20:26:09 2007
@@ -38,7 +38,7 @@
class SelectionDAG;
class MachineBasicBlock;
class MachineInstr;
- class PackedType;
+ class VectorType;
//===----------------------------------------------------------------------===//
/// TargetLowering - This class defines information used to lower LLVM code to
@@ -198,16 +198,16 @@
return VT;
}
- /// getPackedTypeBreakdown - Packed types are broken down into some number of
+ /// getVectorTypeBreakdown - Packed types are broken down into some number of
/// legal first class types. For example, <8 x float> maps to 2 MVT::v4f32
/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
/// Similarly, <2 x long> turns into 4 MVT::i32 values with both PPC and X86.
///
/// This method returns the number of registers needed, and the VT for each
- /// register. It also returns the VT of the PackedType elements before they
+ /// register. It also returns the VT of the VectorType elements before they
/// are promoted/expanded.
///
- unsigned getPackedTypeBreakdown(const PackedType *PTy,
+ unsigned getVectorTypeBreakdown(const VectorType *PTy,
MVT::ValueType &PTyElementVT,
MVT::ValueType &PTyLegalElementVT) const;
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