[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Evan Cheng]

On Feb 13, 2007, at 5:50 AM, Lauro Ramos Venancio wrote:

>
>
> Changes in directory llvm/lib/CodeGen/SelectionDAG:
>
> SelectionDAGISel.cpp updated: 1.361 -> 1.362
> ---
> Log message:
>
> Add "original alignment" to function arguments flags.
>
>
> ---
> Diffs of the changes:  (+30 -10)
>
>  SelectionDAGISel.cpp |   40 ++++++++++++++++++++++++++++++----------
>  1 files changed, 30 insertions(+), 10 deletions(-)
>
>
> Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.361  
> llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.362
> --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.361	Mon  
> Feb 12 19:05:56 2007
> +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Tue Feb 13  
> 07:50:08 2007
> @@ -2933,8 +2933,13 @@
>      MVT::ValueType VT = getValueType(I->getType());
>      bool isInReg = FTy->paramHasAttr(j,  
> FunctionType::InRegAttribute);
>      bool isSRet  = FTy->paramHasAttr(j,  
> FunctionType::StructRetAttribute);
> -    unsigned Flags = (isInReg << 1) | (isSRet << 2);
> -
> +    unsigned OriginalAlignment =
> +      getTargetData()->getTypeAlignmentABI(I->getType());
> +    //Flags[31:27]-> OriginalAlignment
> +    //Flags[2] -> isSRet
> +    //Flags[1] -> isInReg
> +    unsigned Flags = (isInReg << 1) | (isSRet << 2) |  
> (OriginalAlignment << 27);
> +

Some comments:

1. Why 27 - 31 instead of 3 - 6? Please add comment to  
SelectionDAGNodes.h (see CALL).
2. Purely a stylistic nitpick. Please add a space between // and the  
actual comment.

Thanks,

Evan


>      switch (getTypeAction(VT)) {
>      default: assert(0 && "Unknown type action!");
>      case Legal:
> @@ -2954,6 +2959,8 @@
>          unsigned NumVals = getNumElements(VT);
>          for (unsigned i = 0; i != NumVals; ++i) {
>            RetVals.push_back(NVT);
> +          //if it isn't first piece, alignment must be 1
> +          if (i == 1) Flags = (Flags & 0x07ffffff) | (1 << 27);
>            Ops.push_back(DAG.getConstant(Flags, MVT::i32));
>          }
>        } else {
> @@ -3053,11 +3060,16 @@
>  /// ExpandScalarCallArgs - Recursively expand call argument node by
>  /// bit_converting it or extract a pair of elements from the  
> larger  node.
>  static void ExpandScalarCallArgs(MVT::ValueType VT, SDOperand Arg,
> -                                 unsigned Flags,
> +                                 unsigned Flags,
>                                   SmallVector<SDOperand, 32> &Ops,
>                                   SelectionDAG &DAG,
> -                                 TargetLowering &TLI) {
> +                                 TargetLowering &TLI,
> +                                 bool isFirst = true) {
> +
>    if (TLI.getTypeAction(VT) != TargetLowering::Expand) {
> +    //if it isn't first piece, alignment must be 1
> +    if (!isFirst)
> +      Flags = (Flags & 0x07ffffff) | (1 << 27);
>      Ops.push_back(Arg);
>      Ops.push_back(DAG.getConstant(Flags, MVT::i32));
>      return;
> @@ -3067,7 +3079,7 @@
>    unsigned NumVals = MVT::getSizeInBits(VT) / MVT::getSizeInBits 
> (EVT);
>    if (NumVals == 1) {
>      Arg = DAG.getNode(ISD::BIT_CONVERT, EVT, Arg);
> -    ExpandScalarCallArgs(EVT, Arg, Flags, Ops, DAG, TLI);
> +    ExpandScalarCallArgs(EVT, Arg, Flags, Ops, DAG, TLI, isFirst);
>    } else if (NumVals == 2) {
>      SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, EVT, Arg,
>                                 DAG.getConstant(0, TLI.getPointerTy 
> ()));
> @@ -3075,8 +3087,8 @@
>                                 DAG.getConstant(1, TLI.getPointerTy 
> ()));
>      if (!TLI.isLittleEndian())
>        std::swap(Lo, Hi);
> -    ExpandScalarCallArgs(EVT, Lo, Flags, Ops, DAG, TLI);
> -    ExpandScalarCallArgs(EVT, Hi, Flags, Ops, DAG, TLI);
> +    ExpandScalarCallArgs(EVT, Lo, Flags, Ops, DAG, TLI, isFirst);
> +    ExpandScalarCallArgs(EVT, Hi, Flags, Ops, DAG, TLI, false);
>    } else {
>      // Value scalarized into many values.  Unimp for now.
>      assert(0 && "Cannot expand i64 -> i16 yet!");
> @@ -3106,11 +3118,19 @@
>      SDOperand Op = Args[i].Node;
>      bool isSigned = Args[i].isSigned;
>      bool isInReg = Args[i].isInReg;
> -    bool isSRet  = Args[i].isSRet;
> -    unsigned Flags = (isSRet << 2) | (isInReg << 1) | isSigned;
> +    bool isSRet  = Args[i].isSRet;
> +    unsigned OriginalAlignment =
> +      getTargetData()->getTypeAlignmentABI(Args[i].Ty);
> +    //Flags[31:27]-> OriginalAlignment
> +    //Flags[2] -> isSRet
> +    //Flags[1] -> isInReg
> +    //Flags[0] -> isSigned
> +    unsigned Flags = (isSRet << 2) | (isInReg << 1) | isSigned |
> +      (OriginalAlignment << 27);
> +
>      switch (getTypeAction(VT)) {
>      default: assert(0 && "Unknown type action!");
> -    case Legal:
> +    case Legal:
>        Ops.push_back(Op);
>        Ops.push_back(DAG.getConstant(Flags, MVT::i32));
>        break;
>
>
>
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