[llvm-commits] [patch] Intruction Constraint DestReg!=SrcReg (for review)

Lauro Ramos Venancio lauro.venancio at gmail.com
Tue Feb 6 08:51:29 PST 2007


READ_LATENCY patch for review.

Sample of use:
class RegConstraint<string C> {
 string Constraints = C;
}

// AI_orr - Defines a (op r, r) pattern.
class AI_orr<string opc, SDNode opnode>
 : AI<(ops GPR:$dst, GPR:$a, GPR:$b),
      !strconcat(opc, " $dst, $a, $b"),
      [(set GPR:$dst, (opnode GPR:$a, GPR:$b))]>,
       RegConstraint<"$a lat 2">;


Lauro

2007/1/26, Evan Cheng <evan.cheng at apple.com>:
>
> On Jan 26, 2007, at 1:07 PM, Lauro Ramos Venancio wrote:
>
> >> The facility does that have to be that general. There are 4 cycles
> >> between every two instructions.  See LiveIntervalAnalysis:
> >>
> >>      struct InstrSlots {
> >>        enum {
> >>          LOAD  = 0,
> >>          USE   = 1,
> >>          DEF   = 2,
> >>          STORE = 3,
> >>          NUM   = 4
> >>        };
> >>      };
> >>
> >> We can restrict the constraint range to 1 - 3. This ensures the last
> >> use is always the kill while retaining its flexibility.
> >>
> >> Evan
> >
> > I will try to implement this. Do you have any suggestion for
> > constraint name and syntax?
>
> I don't have any great ideas. Perhaps READ_LATENCY for constraint and
> something like
>
> $src +lat 2
>
> for syntax?
>
> Feel free to choose something else if you have better ideas.
>
> Thanks,
>
> Evan
>
> >
> > Lauro
>
>
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