[llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp Constants.cpp Instructions.cpp Verifier.cpp
Reid Spencer
reid at x10sys.com
Thu Feb 1 18:17:37 PST 2007
Changes in directory llvm/lib/VMCore:
AsmWriter.cpp updated: 1.257 -> 1.258
Constants.cpp updated: 1.206 -> 1.207
Instructions.cpp updated: 1.70 -> 1.71
Verifier.cpp updated: 1.188 -> 1.189
---
Log message:
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
---
Diffs of the changes: (+26 -52)
AsmWriter.cpp | 3 +--
Constants.cpp | 37 ++-----------------------------------
Instructions.cpp | 9 ++++++++-
Verifier.cpp | 29 +++++++++++++++--------------
4 files changed, 26 insertions(+), 52 deletions(-)
Index: llvm/lib/VMCore/AsmWriter.cpp
diff -u llvm/lib/VMCore/AsmWriter.cpp:1.257 llvm/lib/VMCore/AsmWriter.cpp:1.258
--- llvm/lib/VMCore/AsmWriter.cpp:1.257 Tue Jan 30 14:08:38 2007
+++ llvm/lib/VMCore/AsmWriter.cpp Thu Feb 1 20:16:22 2007
@@ -1272,8 +1272,7 @@
// Shift Left & Right print both types even for Ubyte LHS, and select prints
// types even if all operands are bools.
- if (isa<ShiftInst>(I) || isa<SelectInst>(I) || isa<StoreInst>(I) ||
- isa<ShuffleVectorInst>(I)) {
+ if (isa<SelectInst>(I) || isa<StoreInst>(I) || isa<ShuffleVectorInst>(I)) {
PrintAllTypes = true;
} else {
for (unsigned i = 1, E = I.getNumOperands(); i != E; ++i) {
Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.206 llvm/lib/VMCore/Constants.cpp:1.207
--- llvm/lib/VMCore/Constants.cpp:1.206 Tue Jan 30 22:40:28 2007
+++ llvm/lib/VMCore/Constants.cpp Thu Feb 1 20:16:22 2007
@@ -1302,10 +1302,7 @@
if (Instruction::isCast(V.opcode))
return new UnaryConstantExpr(V.opcode, V.operands[0], Ty);
if ((V.opcode >= Instruction::BinaryOpsBegin &&
- V.opcode < Instruction::BinaryOpsEnd) ||
- V.opcode == Instruction::Shl ||
- V.opcode == Instruction::LShr ||
- V.opcode == Instruction::AShr)
+ V.opcode < Instruction::BinaryOpsEnd))
return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]);
if (V.opcode == Instruction::Select)
return new SelectConstantExpr(V.operands[0], V.operands[1],
@@ -1362,12 +1359,6 @@
OldC->getOperand(1),
OldC->getOperand(2));
break;
- case Instruction::Shl:
- case Instruction::LShr:
- case Instruction::AShr:
- New = ConstantExpr::getShiftTy(NewTy, OldC->getOpcode(),
- OldC->getOperand(0), OldC->getOperand(1));
- break;
default:
assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin &&
OldC->getOpcode() < Instruction::BinaryOpsEnd);
@@ -1603,10 +1594,6 @@
Constant *ConstantExpr::getTy(const Type *ReqTy, unsigned Opcode,
Constant *C1, Constant *C2) {
- if (Opcode == Instruction::Shl || Opcode == Instruction::LShr ||
- Opcode == Instruction::AShr)
- return getShiftTy(ReqTy, Opcode, C1, C2);
-
// Check the operands for consistency first
assert(Opcode >= Instruction::BinaryOpsBegin &&
Opcode < Instruction::BinaryOpsEnd &&
@@ -1689,7 +1676,7 @@
case Instruction::Shl:
case Instruction::LShr:
case Instruction::AShr:
- assert(C2->getType() == Type::Int8Ty && "Shift should be by i8!");
+ assert(C1->getType() == C2->getType() && "Op types should be identical!");
assert(C1->getType()->isInteger() &&
"Tried to create a shift operation on a non-integer type!");
break;
@@ -1724,26 +1711,6 @@
return ExprConstants->getOrCreate(ReqTy, Key);
}
-/// getShiftTy - Return a shift left or shift right constant expr
-Constant *ConstantExpr::getShiftTy(const Type *ReqTy, unsigned Opcode,
- Constant *C1, Constant *C2) {
- // Check the operands for consistency first
- assert((Opcode == Instruction::Shl ||
- Opcode == Instruction::LShr ||
- Opcode == Instruction::AShr) &&
- "Invalid opcode in binary constant expression");
- assert(C1->getType()->isInteger() && C2->getType() == Type::Int8Ty &&
- "Invalid operand types for Shift constant expr!");
-
- if (Constant *FC = ConstantFoldBinaryInstruction(Opcode, C1, C2))
- return FC; // Fold a few common cases...
-
- // Look up the constant in the table first to ensure uniqueness
- std::vector<Constant*> argVec(1, C1); argVec.push_back(C2);
- ExprMapKeyType Key(Opcode, argVec);
- return ExprConstants->getOrCreate(ReqTy, Key);
-}
-
Constant *ConstantExpr::getGetElementPtrTy(const Type *ReqTy, Constant *C,
Value* const *Idxs,
unsigned NumIdx) {
Index: llvm/lib/VMCore/Instructions.cpp
diff -u llvm/lib/VMCore/Instructions.cpp:1.70 llvm/lib/VMCore/Instructions.cpp:1.71
--- llvm/lib/VMCore/Instructions.cpp:1.70 Wed Jan 31 22:59:37 2007
+++ llvm/lib/VMCore/Instructions.cpp Thu Feb 1 20:16:22 2007
@@ -1088,6 +1088,14 @@
cast<PackedType>(getType())->getElementType()->isFloatingPoint()))
&& "Incorrect operand type (not floating point) for FREM");
break;
+ case Shl:
+ case LShr:
+ case AShr:
+ assert(getType() == LHS->getType() &&
+ "Shift operation should return same type as operands!");
+ assert(getType()->isInteger() &&
+ "Shift operation requires integer operands");
+ break;
case And: case Or:
case Xor:
assert(getType() == LHS->getType() &&
@@ -2299,7 +2307,6 @@
CastInst *IntToPtrInst::clone() const { return new IntToPtrInst(*this); }
CastInst *BitCastInst::clone() const { return new BitCastInst(*this); }
CallInst *CallInst::clone() const { return new CallInst(*this); }
-ShiftInst *ShiftInst::clone() const { return new ShiftInst(*this); }
SelectInst *SelectInst::clone() const { return new SelectInst(*this); }
VAArgInst *VAArgInst::clone() const { return new VAArgInst(*this); }
Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.188 llvm/lib/VMCore/Verifier.cpp:1.189
--- llvm/lib/VMCore/Verifier.cpp:1.188 Tue Jan 30 14:08:38 2007
+++ llvm/lib/VMCore/Verifier.cpp Thu Feb 1 20:16:22 2007
@@ -196,7 +196,6 @@
void visitBinaryOperator(BinaryOperator &B);
void visitICmpInst(ICmpInst &IC);
void visitFCmpInst(FCmpInst &FC);
- void visitShiftInst(ShiftInst &SI);
void visitExtractElementInst(ExtractElementInst &EI);
void visitInsertElementInst(InsertElementInst &EI);
void visitShuffleVectorInst(ShuffleVectorInst &EI);
@@ -713,9 +712,11 @@
Assert1(B.getOperand(0)->getType() == B.getOperand(1)->getType(),
"Both operands to a binary operator are not of the same type!", &B);
+ switch (B.getOpcode()) {
// Check that logical operators are only used with integral operands.
- if (B.getOpcode() == Instruction::And || B.getOpcode() == Instruction::Or ||
- B.getOpcode() == Instruction::Xor) {
+ case Instruction::And:
+ case Instruction::Or:
+ case Instruction::Xor:
Assert1(B.getType()->isInteger() ||
(isa<PackedType>(B.getType()) &&
cast<PackedType>(B.getType())->getElementType()->isInteger()),
@@ -723,7 +724,16 @@
Assert1(B.getType() == B.getOperand(0)->getType(),
"Logical operators must have same type for operands and result!",
&B);
- } else {
+ break;
+ case Instruction::Shl:
+ case Instruction::LShr:
+ case Instruction::AShr:
+ Assert1(B.getType()->isInteger(),
+ "Shift must return an integer result!", &B);
+ Assert1(B.getType() == B.getOperand(0)->getType(),
+ "Shift return type must be same as operands!", &B);
+ /* FALL THROUGH */
+ default:
// Arithmetic operators only work on integer or fp values
Assert1(B.getType() == B.getOperand(0)->getType(),
"Arithmetic operators must have same type for operands and result!",
@@ -731,6 +741,7 @@
Assert1(B.getType()->isInteger() || B.getType()->isFloatingPoint() ||
isa<PackedType>(B.getType()),
"Arithmetic operators must have integer, fp, or packed type!", &B);
+ break;
}
visitInstruction(B);
@@ -760,16 +771,6 @@
visitInstruction(FC);
}
-void Verifier::visitShiftInst(ShiftInst &SI) {
- Assert1(SI.getType()->isInteger(),
- "Shift must return an integer result!", &SI);
- Assert1(SI.getType() == SI.getOperand(0)->getType(),
- "Shift return type must be same as first operand!", &SI);
- Assert1(SI.getOperand(1)->getType() == Type::Int8Ty,
- "Second operand to shift must be ubyte type!", &SI);
- visitInstruction(SI);
-}
-
void Verifier::visitExtractElementInst(ExtractElementInst &EI) {
Assert1(ExtractElementInst::isValidOperands(EI.getOperand(0),
EI.getOperand(1)),
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