[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Evan Cheng
evan.cheng at apple.com
Thu Feb 1 12:37:45 PST 2007
Yep. I shouldn't have checked in stuff just before I went to bed. :-)
You can tell there is a definite mismatch between comments and code.
Lots of copy and paste bugs.
Thanks,
Evan
On Feb 1, 2007, at 9:34 AM, Lauro Ramos Venancio wrote:
> Hi Evan,
>
> Does this patch is correct? According to ARM manual, AddrMode2 and
> AddrMode3 don't have scale (scale=1).
> I think MaxOffs should be ((1 << Bits) - 1) * Scale.
>
> Lauro
>
>> @@ -304,34 +307,42 @@
>> continue;
>> assert(0 && "Unknown addressing mode for CP
>> reference!");
>> case ARMII::AddrMode1: // AM1: 8 bits << 2
>> - MaxOffs = 1 << (8+2); // Taking the address of a CP
>> entry.
>> + Bits = 8;
>> + Scale = 4; // Taking the address of a CP entry.
>> break;
>> case ARMII::AddrMode2:
>> - MaxOffs = 1 << 12; // +-offset_12
>> + Bits = 12;
>> + Scale = 2; // +-offset_12
>> break;
>> case ARMII::AddrMode3:
>> - MaxOffs = 1 << 8; // +-offset_8
>> + Bits = 8;
>> + Scale = 2; // +-offset_8
>> break;
>> // addrmode4 has no immediate offset.
>> case ARMII::AddrMode5:
>> - MaxOffs = 1 << (8+2); // +-(offset_8*4)
>> + Bits = 8;
>> + Scale = 4; // +-(offset_8*4)
>> break;
>> case ARMII::AddrModeT1:
>> - MaxOffs = 1 << 5;
>> + Bits = 5; // +offset_5
>> break;
>> case ARMII::AddrModeT2:
>> - MaxOffs = 1 << (5+1);
>> + Bits = 5;
>> + Scale = 2; // +(offset_5*2)
>> break;
>> case ARMII::AddrModeT4:
>> - MaxOffs = 1 << (5+2);
>> + Bits = 5;
>> + Scale = 4; // +(offset_5*4)
>> break;
>> case ARMII::AddrModeTs:
>> - MaxOffs = 1 << (8+2);
>> + Bits = 8;
>> + Scale = 4; // +(offset_8*4)
>> break;
>> }
>> -
>> +
>> // Remember that this is a user of a CP entry.
>> MachineInstr *CPEMI =CPEMIs[I->getOperand
>> (op).getConstantPoolIndex()];
>> + unsigned MaxOffs = (1 << (Bits-1)) * Scale;
>> CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
More information about the llvm-commits
mailing list