[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Chris Lattner sabre at nondot.org
Wed Jan 31 17:21:27 PST 2007



Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.352 -> 1.353
---
Log message:

Emit a better assertion message for PR1133: http://llvm.org/PR1133 


---
Diffs of the changes:  (+18 -15)

 SelectionDAGISel.cpp |   33 ++++++++++++++++++---------------
 1 files changed, 18 insertions(+), 15 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.352 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.353
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.352	Tue Jan 30 14:08:37 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Wed Jan 31 19:21:12 2007
@@ -2663,23 +2663,26 @@
 
         unsigned NumOps = 
           cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getValue();
-        assert((NumOps & 7) == 2 /*REGDEF*/ &&
-               "Skipped past definitions?");
+        if ((NumOps & 7) == 2 /*REGDEF*/) {
+          // Add NumOps>>3 registers to MatchedRegs.
+          RegsForValue MatchedRegs;
+          MatchedRegs.ValueVT = InOperandVal.getValueType();
+          MatchedRegs.RegVT   = AsmNodeOperands[CurOp+1].getValueType();
+          for (unsigned i = 0, e = NumOps>>3; i != e; ++i) {
+            unsigned Reg =
+              cast<RegisterSDNode>(AsmNodeOperands[++CurOp])->getReg();
+            MatchedRegs.Regs.push_back(Reg);
+          }
         
-        // Add NumOps>>3 registers to MatchedRegs.
-        RegsForValue MatchedRegs;
-        MatchedRegs.ValueVT = InOperandVal.getValueType();
-        MatchedRegs.RegVT   = AsmNodeOperands[CurOp+1].getValueType();
-        for (unsigned i = 0, e = NumOps>>3; i != e; ++i) {
-          unsigned Reg=cast<RegisterSDNode>(AsmNodeOperands[++CurOp])->getReg();
-          MatchedRegs.Regs.push_back(Reg);
+          // Use the produced MatchedRegs object to 
+          MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag,
+                                    TLI.getPointerTy());
+          MatchedRegs.AddInlineAsmOperands(1 /*REGUSE*/, DAG, AsmNodeOperands);
+          break;
+        } else {
+          assert((NumOps & 7) == 4/*MEM*/ && "Unknown matching constraint!");
+          assert(0 && "matching constraints for memory operands unimp");
         }
-        
-        // Use the produced MatchedRegs object to 
-        MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag,
-                                  TLI.getPointerTy());
-        MatchedRegs.AddInlineAsmOperands(1 /*REGUSE*/, DAG, AsmNodeOperands);
-        break;
       }
       
       TargetLowering::ConstraintType CTy = TargetLowering::C_RegisterClass;






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