[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

[Chris Lattner]

Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.611 -> 1.612
---
Log message:

remove some bits that are not yet meant to land.


---
Diffs of the changes:  (+0 -57)

 InstructionCombining.cpp |   57 -----------------------------------------------
 1 files changed, 57 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.611 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.612
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.611	Tue Jan 30 16:32:46 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Tue Jan 30 16:50:32 2007
@@ -1355,63 +1355,6 @@
     break;
   }
     
-  case Instruction::BitCast: {
-    // packed->packed 
-    const PackedType *PTy = dyn_cast<PackedType>(I->getOperand(0)->getType());
-    if (!PTy) break;
-    unsigned InVWidth = PTy->getNumElements();
-    uint64_t InputDemandedElts = 0;
-    unsigned Ratio;
-
-    if (VWidth == InVWidth) {
-      Ratio = 1;
-      InputDemandedElts = DemandedElts;
-    } else if (VWidth > InVWidth) {
-      // If there are more elements in the result than there are in the source,
-      // then an input element is live if any of the corresponding output
-      // elements are live.
-      Ratio = VWidth/InVWidth;
-      for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
-        if (DemandedElts & (1ULL << OutIdx))
-          InputDemandedElts |= 1ULL << (OutIdx/Ratio);
-      }
-    } else {
-      // If there are more elements in the source than there are in the result,
-      // then an input element is live if the corresponding output element is
-      // live.
-      Ratio = InVWidth/VWidth;
-      for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
-        if (DemandedElts & (1ULL << InIdx/Ratio))
-          InputDemandedElts |= 1ULL << InIdx;
-    }
-    
-    // div/rem demand all inputs, because they don't want divide by zero.
-    TmpV = SimplifyDemandedVectorElts(I->getOperand(0), InputDemandedElts,
-                                      UndefElts2, Depth+1);
-    if (TmpV) {
-      I->setOperand(0, TmpV);
-      MadeChange = true;
-    }
-    
-    UndefElts = UndefElts2;
-    if (VWidth > InVWidth) {
-      // If there are more elements in the result than there are in the source,
-      // then an output element is undef if the corresponding input element is
-      // undef.
-      for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
-        if (UndefElts2 & (1ULL << (OutIdx/Ratio)))
-          UndefElts |= 1ULL << OutIdx;
-    } else if (VWidth < InVWidth) {
-      // If there are more elements in the source than there are in the result,
-      // then a result element is undef if all of the corresponding input
-      // elements are undef.
-      UndefElts = ~0ULL >> (64-VWidth);  // Start out all undef.
-      for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
-        if ((UndefElts2 & (1ULL << InIdx)) == 0)    // Not undef?
-          UndefElts &= ~(1ULL << (InIdx/Ratio));    // Clear undef bit.
-    }
-    break;
-  }
   case Instruction::And:
   case Instruction::Or:
   case Instruction::Xor: