[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.td

[Evan Cheng]

Changes in directory llvm/lib/Target/ARM:

ARMRegisterInfo.td updated: 1.9 -> 1.10
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Log message:

Comment.

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Diffs of the changes:  (+1 -1)

 ARMRegisterInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/ARM/ARMRegisterInfo.td
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.9 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.10
--- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.9	Mon Jan 22 18:52:44 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.td	Mon Jan 29 16:23:02 2007
@@ -97,7 +97,7 @@
   }];
   // FIXME: We are reserving r12 in case the PEI needs to use it to
   // generate large stack offset. Make it available once we have register
-  // scavenging.
+  // scavenging. Similarly r3 is reserved in Thumb mode for now.
   let MethodBodies = [{
     // FP is R11, R9 is available.
     static const unsigned ARM_GPR_AO_1[] = {