[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp ARMISelLowering.cpp ARMInstrInfo.cpp ARMInstrInfo.h ARMInstrInfo.td
Jim Laskey
jlaskey at apple.com
Fri Jan 26 06:35:30 PST 2007
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.8 -> 1.9
ARMISelLowering.cpp updated: 1.3 -> 1.4
ARMInstrInfo.cpp updated: 1.11 -> 1.12
ARMInstrInfo.h updated: 1.5 -> 1.6
ARMInstrInfo.td updated: 1.85 -> 1.86
---
Log message:
Make LABEL a builtin opcode.
---
Diffs of the changes: (+3 -15)
ARMConstantIslandPass.cpp | 2 ++
ARMISelLowering.cpp | 2 +-
ARMInstrInfo.cpp | 4 ----
ARMInstrInfo.h | 5 -----
ARMInstrInfo.td | 5 -----
5 files changed, 3 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.8 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.9
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.8 Thu Jan 25 20:02:39 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Fri Jan 26 08:34:51 2007
@@ -336,6 +336,8 @@
// If this machine instr is an inline asm, measure it.
if (MI->getOpcode() == ARM::INLINEASM)
return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
+ if (MI->getOpcode() == ARM::LABEL)
+ return 0;
assert(0 && "Unknown or unset size field for instr!");
break;
case ARMII::Size8Bytes: return 8; // Arm instruction x 2.
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.3 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.4
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.3 Mon Jan 22 13:40:10 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Fri Jan 26 08:34:51 2007
@@ -147,7 +147,7 @@
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
// FIXME - use subtarget debug flags
if (Subtarget->isTargetDarwin())
- setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::LABEL, MVT::Other, Expand);
setOperationAction(ISD::RET, MVT::Other, Custom);
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.11 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.12
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.11 Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.cpp Fri Jan 26 08:34:51 2007
@@ -30,10 +30,6 @@
RI(*this, STI) {
}
-unsigned ARMInstrInfo::getDWARF_LABELOpcode() const {
- return ARM::DWARF_LABEL;
-}
-
const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const {
return &ARM::GPRRegClass;
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.h
diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.5 llvm/lib/Target/ARM/ARMInstrInfo.h:1.6
--- llvm/lib/Target/ARM/ARMInstrInfo.h:1.5 Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.h Fri Jan 26 08:34:51 2007
@@ -80,11 +80,6 @@
/// This is used for addressing modes.
virtual const TargetRegisterClass *getPointerRegClass() const;
- /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
- /// instruction if it has one. This is used by codegen passes that update
- /// DWARF line number info as they modify the code.
- virtual unsigned getDWARF_LABELOpcode() const;
-
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
///
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.85 llvm/lib/Target/ARM/ARMInstrInfo.td:1.86
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.85 Fri Jan 19 14:27:35 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Fri Jan 26 08:34:51 2007
@@ -513,11 +513,6 @@
".loc $file, $line, $col",
[(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>;
-def DWARF_LABEL :
-PseudoInst<(ops i32imm:$id),
- "\nLdebug_loc${id:no_hash}:",
- [(dwarf_label (i32 imm:$id))]>;
-
def PICADD : AI1<(ops GPR:$dst, GPR:$a, pclabel:$cp),
"\n$cp:\n\tadd $dst, pc, $a",
[(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>;
More information about the llvm-commits
mailing list