[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll fcopysign.ll fpcmp_ueq.ll large-stack.ll ldr_ext.ll ldr_frame.ll mul.ll select.ll sxt_rot.ll thumb-imm.ll uxt_rot.ll
Reid Spencer
reid at x10sys.com
Fri Jan 26 00:26:07 PST 2007
Changes in directory llvm/test/CodeGen/ARM:
2007-01-19-InfiniteLoop.ll updated: 1.1 -> 1.2
fcopysign.ll updated: 1.5 -> 1.6
fpcmp_ueq.ll updated: 1.3 -> 1.4
large-stack.ll updated: 1.1 -> 1.2
ldr_ext.ll updated: 1.2 -> 1.3
ldr_frame.ll updated: 1.1 -> 1.2
mul.ll updated: 1.4 -> 1.5
select.ll updated: 1.11 -> 1.12
sxt_rot.ll updated: 1.1 -> 1.2
thumb-imm.ll updated: 1.1 -> 1.2
uxt_rot.ll updated: 1.1 -> 1.2
---
Log message:
For PR761: http://llvm.org/PR761 :
Remove "target endian/pointersize" or add "target datalayout" to make
the test parse properly or set the datalayout because defaults changes.
For PR645: http://llvm.org/PR645 :
Make global names use the @ prefix.
For llvm-upgrade changes:
Fix test cases or completely remove use of llvm-upgrade for test cases
that cannot survive the new renaming or upgrade capabilities.
---
Diffs of the changes: (+47 -47)
2007-01-19-InfiniteLoop.ll | 26 +++++++++++++-------------
fcopysign.ll | 10 +++++-----
fpcmp_ueq.ll | 2 +-
large-stack.ll | 4 ++--
ldr_ext.ll | 8 ++++----
ldr_frame.ll | 8 ++++----
mul.ll | 8 ++++----
select.ll | 14 +++++++-------
sxt_rot.ll | 4 ++--
thumb-imm.ll | 4 ++--
uxt_rot.ll | 6 +++---
11 files changed, 47 insertions(+), 47 deletions(-)
Index: llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
diff -u llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll:1.1 llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll:1.2
--- llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll:1.1 Fri Jan 19 16:43:14 2007
+++ llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll Fri Jan 26 02:25:05 2007
@@ -1,10 +1,10 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
-%quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
-%dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
-%A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
+ at quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+ at dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+ at A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
-define fastcc i32 %dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
+define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
entry:
%predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1]
br label %cond_next489
@@ -17,7 +17,7 @@
%tmp495 = getelementptr [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=2]
%tmp496 = load i32* %tmp495 ; <i32> [#uses=2]
%tmp502 = load i32* null ; <i32> [#uses=1]
- %tmp542 = getelementptr [6 x [4 x [4 x i32]]]* %quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp542 = getelementptr [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
%tmp543 = load i32* %tmp542 ; <i32> [#uses=1]
%tmp548 = ashr i32 0, i8 0 ; <i32> [#uses=3]
%tmp561 = sub i32 0, %tmp496 ; <i32> [#uses=3]
@@ -30,14 +30,14 @@
br i1 %tmp579, label %bb712, label %cond_next589
cond_next589: ; preds = %cond_next489
- %tmp605 = getelementptr [6 x [4 x [4 x i32]]]* %dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp605 = getelementptr [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
%tmp606 = load i32* %tmp605 ; <i32> [#uses=1]
%tmp612 = load i32* null ; <i32> [#uses=1]
%tmp629 = load i32* null ; <i32> [#uses=1]
%tmp629 = sitofp i32 %tmp629 to double ; <double> [#uses=1]
%tmp631 = mul double %tmp629, 0.000000e+00 ; <double> [#uses=1]
%tmp632 = add double 0.000000e+00, %tmp631 ; <double> [#uses=1]
- %tmp642 = call fastcc i32 %sign( i32 %tmp576, i32 %tmp561 ) ; <i32> [#uses=1]
+ %tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 ) ; <i32> [#uses=1]
%tmp650 = mul i32 %tmp606, %tmp642 ; <i32> [#uses=1]
%tmp656 = mul i32 %tmp650, %tmp612 ; <i32> [#uses=1]
%tmp658 = shl i32 %tmp656, i8 0 ; <i32> [#uses=1]
@@ -45,7 +45,7 @@
%tmp660 = sub i32 0, %tmp659 ; <i32> [#uses=1]
%tmp666 = sub i32 %tmp660, %tmp496 ; <i32> [#uses=1]
%tmp666 = sitofp i32 %tmp666 to double ; <double> [#uses=2]
- call void %levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
+ call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
%tmp671 = mul double %tmp666, %tmp666 ; <double> [#uses=1]
%tmp675 = add double %tmp671, 0.000000e+00 ; <double> [#uses=1]
%tmp678 = fcmp oeq double %tmp632, %tmp675 ; <i1> [#uses=1]
@@ -79,9 +79,9 @@
br i1 %tmp739, label %cond_next791, label %cond_true740
cond_true740: ; preds = %bb737
- %tmp761 = call fastcc i32 %sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1]
+ %tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1]
%tmp780 = load i32* null ; <i32> [#uses=1]
- %tmp785 = getelementptr [4 x [4 x i32]]* %A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp785 = getelementptr [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
%tmp786 = load i32* %tmp785 ; <i32> [#uses=1]
%tmp781 = mul i32 %tmp780, %tmp761 ; <i32> [#uses=1]
%tmp787 = mul i32 %tmp781, %tmp786 ; <i32> [#uses=1]
@@ -94,10 +94,10 @@
%tmp796 = load i32* %tmp495 ; <i32> [#uses=1]
%tmp798 = add i32 %tmp796, %ilev.1 ; <i32> [#uses=1]
%tmp812 = mul i32 0, %tmp502 ; <i32> [#uses=0]
- %tmp818 = call fastcc i32 %sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0]
+ %tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0]
unreachable
}
-declare i32 %sign(i32, i32)
+declare i32 @sign(i32, i32)
-declare void %levrun_linfo_inter(i32, i32, i32*, i32*)
+declare void @levrun_linfo_inter(i32, i32, i32*, i32*)
Index: llvm/test/CodeGen/ARM/fcopysign.ll
diff -u llvm/test/CodeGen/ARM/fcopysign.ll:1.5 llvm/test/CodeGen/ARM/fcopysign.ll:1.6
--- llvm/test/CodeGen/ARM/fcopysign.ll:1.5 Thu Jan 25 16:11:02 2007
+++ llvm/test/CodeGen/ARM/fcopysign.ll Fri Jan 26 02:25:05 2007
@@ -3,17 +3,17 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 &&
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fneg | wc -l | grep 2
-define float %test1(float %x, double %y) {
+define float @test1(float %x, double %y) {
%tmp = fpext float %x to double
- %tmp2 = tail call double %copysign( double %tmp, double %y )
+ %tmp2 = tail call double @copysign( double %tmp, double %y )
%tmp2 = fptrunc double %tmp2 to float
ret float %tmp2
}
-define double %test2(double %x, float %y) {
+define double @test2(double %x, float %y) {
%tmp = fpext float %y to double
- %tmp2 = tail call double %copysign( double %x, double %tmp )
+ %tmp2 = tail call double @copysign( double %x, double %tmp )
ret double %tmp2
}
-declare double %copysign(double, double)
+declare double @copysign(double, double)
Index: llvm/test/CodeGen/ARM/fpcmp_ueq.ll
diff -u llvm/test/CodeGen/ARM/fpcmp_ueq.ll:1.3 llvm/test/CodeGen/ARM/fpcmp_ueq.ll:1.4
--- llvm/test/CodeGen/ARM/fpcmp_ueq.ll:1.3 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/fpcmp_ueq.ll Fri Jan 26 02:25:05 2007
@@ -2,7 +2,7 @@
; RUN: llvm-as < %s | llc -march=arm | grep moveq &&
; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep movvs
-define i32 %f7(float %a, float %b) {
+define i32 @f7(float %a, float %b) {
entry:
%tmp = fcmp ueq float %a,%b
%retval = select i1 %tmp, i32 666, i32 42
Index: llvm/test/CodeGen/ARM/large-stack.ll
diff -u llvm/test/CodeGen/ARM/large-stack.ll:1.1 llvm/test/CodeGen/ARM/large-stack.ll:1.2
--- llvm/test/CodeGen/ARM/large-stack.ll:1.1 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/large-stack.ll Fri Jan 26 02:25:05 2007
@@ -1,12 +1,12 @@
; RUN: llvm-as < %s | llc -march=arm &&
; RUN: llvm-as < %s | llc -march=arm -enable-thumb
-define void %test1() {
+define void @test1() {
%tmp = alloca [ 64 x i32 ] , align 4
ret void
}
-define void %test2() {
+define void @test2() {
%tmp = alloca [ 4168 x i8 ] , align 4
ret void
}
Index: llvm/test/CodeGen/ARM/ldr_ext.ll
diff -u llvm/test/CodeGen/ARM/ldr_ext.ll:1.2 llvm/test/CodeGen/ARM/ldr_ext.ll:1.3
--- llvm/test/CodeGen/ARM/ldr_ext.ll:1.2 Tue Jan 23 16:47:58 2007
+++ llvm/test/CodeGen/ARM/ldr_ext.ll Fri Jan 26 02:25:05 2007
@@ -8,25 +8,25 @@
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrsb" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep "ldrsh" | wc -l | grep 1
-define i32 %test1(i8* %v.pntr.s0.u1) {
+define i32 @test1(i8* %v.pntr.s0.u1) {
%tmp.u = load i8* %v.pntr.s0.u1
%tmp1.s = zext i8 %tmp.u to i32
ret i32 %tmp1.s
}
-define i32 %test2(i16* %v.pntr.s0.u1) {
+define i32 @test2(i16* %v.pntr.s0.u1) {
%tmp.u = load i16* %v.pntr.s0.u1
%tmp1.s = zext i16 %tmp.u to i32
ret i32 %tmp1.s
}
-define i32 %test3(i8* %v.pntr.s1.u0) {
+define i32 @test3(i8* %v.pntr.s1.u0) {
%tmp.s = load i8* %v.pntr.s1.u0
%tmp1.s = sext i8 %tmp.s to i32
ret i32 %tmp1.s
}
-define i32 %test4() {
+define i32 @test4() {
%tmp.s = load i16* null
%tmp1.s = sext i16 %tmp.s to i32
ret i32 %tmp1.s
Index: llvm/test/CodeGen/ARM/ldr_frame.ll
diff -u llvm/test/CodeGen/ARM/ldr_frame.ll:1.1 llvm/test/CodeGen/ARM/ldr_frame.ll:1.2
--- llvm/test/CodeGen/ARM/ldr_frame.ll:1.1 Tue Jan 23 20:27:03 2007
+++ llvm/test/CodeGen/ARM/ldr_frame.ll Fri Jan 26 02:25:05 2007
@@ -3,14 +3,14 @@
; RUN: llvm-as < %s | llc -march=arm -enable-thumb &&
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep cpy | wc -l | grep 2
-define i32 %f1() {
+define i32 @f1() {
%buf = alloca [32 x i32], align 4
%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
%tmp1 = load i32* %tmp
ret i32 %tmp1
}
-define i32 %f2() {
+define i32 @f2() {
%buf = alloca [32 x i8], align 4
%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
%tmp1 = load i8* %tmp
@@ -18,14 +18,14 @@
ret i32 %tmp2
}
-define i32 %f3() {
+define i32 @f3() {
%buf = alloca [32 x i32], align 4
%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
%tmp1 = load i32* %tmp
ret i32 %tmp1
}
-define i32 %f4() {
+define i32 @f4() {
%buf = alloca [32 x i8], align 4
%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
%tmp1 = load i8* %tmp
Index: llvm/test/CodeGen/ARM/mul.ll
diff -u llvm/test/CodeGen/ARM/mul.ll:1.4 llvm/test/CodeGen/ARM/mul.ll:1.5
--- llvm/test/CodeGen/ARM/mul.ll:1.4 Tue Jan 23 17:28:50 2007
+++ llvm/test/CodeGen/ARM/mul.ll Fri Jan 26 02:25:05 2007
@@ -4,22 +4,22 @@
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep mul | wc -l | grep 3 &&
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep lsl | wc -l | grep 1
-define i32 %f1(i32 %u) {
+define i32 @f1(i32 %u) {
%tmp = mul i32 %u, %u
ret i32 %tmp
}
-define i32 %f2(i32 %u, i32 %v) {
+define i32 @f2(i32 %u, i32 %v) {
%tmp = mul i32 %u, %v
ret i32 %tmp
}
-define i32 %f3(i32 %u) {
+define i32 @f3(i32 %u) {
%tmp = mul i32 %u, 5
ret i32 %tmp
}
-define i32 %f4(i32 %u) {
+define i32 @f4(i32 %u) {
%tmp = mul i32 %u, 4
ret i32 %tmp
}
Index: llvm/test/CodeGen/ARM/select.ll
diff -u llvm/test/CodeGen/ARM/select.ll:1.11 llvm/test/CodeGen/ARM/select.ll:1.12
--- llvm/test/CodeGen/ARM/select.ll:1.11 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/select.ll Fri Jan 26 02:25:05 2007
@@ -14,49 +14,49 @@
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep bhi | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | grep __ltdf2
-define i32 %f1(i32 %a.s) {
+define i32 @f1(i32 %a.s) {
entry:
%tmp = icmp eq i32 %a.s, 4
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define i32 %f2(i32 %a.s) {
+define i32 @f2(i32 %a.s) {
entry:
%tmp = icmp sgt i32 %a.s, 4
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define i32 %f3(i32 %a.s, i32 %b.s) {
+define i32 @f3(i32 %a.s, i32 %b.s) {
entry:
%tmp = icmp slt i32 %a.s, %b.s
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define i32 %f4(i32 %a.s, i32 %b.s) {
+define i32 @f4(i32 %a.s, i32 %b.s) {
entry:
%tmp = icmp sle i32 %a.s, %b.s
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define i32 %f5(i32 %a.u, i32 %b.u) {
+define i32 @f5(i32 %a.u, i32 %b.u) {
entry:
%tmp = icmp ule i32 %a.u, %b.u
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define i32 %f6(i32 %a.u, i32 %b.u) {
+define i32 @f6(i32 %a.u, i32 %b.u) {
entry:
%tmp = icmp ugt i32 %a.u, %b.u
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
-define double %f7(double %a, double %b) {
+define double @f7(double %a, double %b) {
%tmp = fcmp olt double %a, 1.234e+00
%tmp1 = select i1 %tmp, double -1.000e+00, double %b
ret double %tmp1
Index: llvm/test/CodeGen/ARM/sxt_rot.ll
diff -u llvm/test/CodeGen/ARM/sxt_rot.ll:1.1 llvm/test/CodeGen/ARM/sxt_rot.ll:1.2
--- llvm/test/CodeGen/ARM/sxt_rot.ll:1.1 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/sxt_rot.ll Fri Jan 26 02:25:05 2007
@@ -3,7 +3,7 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep "sxtb" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep "sxtab" | wc -l | grep 1
-define i8 %test1(i32 %A) sext {
+define i8 @test1(i32 %A) sext {
%B = lshr i32 %A, i8 8
%C = shl i32 %A, i8 24
%D = or i32 %B, %C
@@ -11,7 +11,7 @@
ret i8 %E
}
-define i32 %test2(i32 %A, i32 %X) sext {
+define i32 @test2(i32 %A, i32 %X) sext {
%B = lshr i32 %A, i8 8
%C = shl i32 %A, i8 24
%D = or i32 %B, %C
Index: llvm/test/CodeGen/ARM/thumb-imm.ll
diff -u llvm/test/CodeGen/ARM/thumb-imm.ll:1.1 llvm/test/CodeGen/ARM/thumb-imm.ll:1.2
--- llvm/test/CodeGen/ARM/thumb-imm.ll:1.1 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/thumb-imm.ll Fri Jan 26 02:25:05 2007
@@ -2,10 +2,10 @@
; RUN: llvm-as < %s | llc -march=arm -enable-thumb | not grep CPI
-define i32 %test1() {
+define i32 @test1() {
ret i32 1000
}
-define i32 %test2() {
+define i32 @test2() {
ret i32 -256
}
Index: llvm/test/CodeGen/ARM/uxt_rot.ll
diff -u llvm/test/CodeGen/ARM/uxt_rot.ll:1.1 llvm/test/CodeGen/ARM/uxt_rot.ll:1.2
--- llvm/test/CodeGen/ARM/uxt_rot.ll:1.1 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/uxt_rot.ll Fri Jan 26 02:25:05 2007
@@ -4,19 +4,19 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep "uxtab" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep "uxth" | wc -l | grep 1
-define i8 %test1(i32 %A.u) zext {
+define i8 @test1(i32 %A.u) zext {
%B.u = trunc i32 %A.u to i8
ret i8 %B.u
}
-define i32 %test2(i32 %A.u, i32 %B.u) zext {
+define i32 @test2(i32 %A.u, i32 %B.u) zext {
%C.u = trunc i32 %B.u to i8
%D.u = zext i8 %C.u to i32
%E.u = add i32 %A.u, %D.u
ret i32 %E.u
}
-define i32 %test3(i32 %A.u) zext {
+define i32 @test3(i32 %A.u) zext {
%B.u = lshr i32 %A.u, i8 8
%C.u = shl i32 %A.u, i8 24
%D.u = or i32 %B.u, %C.u
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