[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Reid Spencer
reid at x10sys.com
Sat Dec 23 10:58:19 PST 2006
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.573 -> 1.574
---
Log message:
For PR1065: http://llvm.org/PR1065 :
Don't allow CmpInst instances to be processed in FoldSelectOpOp because
you can't easily swap their operands.
---
Diffs of the changes: (+7 -12)
InstructionCombining.cpp | 19 +++++++------------
1 files changed, 7 insertions(+), 12 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.573 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.574
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.573 Sat Dec 23 00:05:41 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Sat Dec 23 12:58:04 2006
@@ -6555,13 +6555,7 @@
}
// Only handle binary, compare and shift operators here.
- if (!isa<ShiftInst>(TI) && !isa<BinaryOperator>(TI) && !isa<CmpInst>(TI))
- return 0;
-
- // If the CmpInst predicates don't match, then the instructions aren't the
- // same and we can't continue.
- if (isa<CmpInst>(TI) && isa<CmpInst>(FI) &&
- (cast<CmpInst>(TI)->getPredicate() != cast<CmpInst>(FI)->getPredicate()))
+ if (!isa<ShiftInst>(TI) && !isa<BinaryOperator>(TI))
return 0;
// Figure out if the operations have any operands in common.
@@ -6603,12 +6597,13 @@
return BinaryOperator::create(BO->getOpcode(), MatchOp, NewSI);
else
return BinaryOperator::create(BO->getOpcode(), NewSI, MatchOp);
- } else {
- if (MatchIsOpZero)
- return new ShiftInst(cast<ShiftInst>(TI)->getOpcode(), MatchOp, NewSI);
- else
- return new ShiftInst(cast<ShiftInst>(TI)->getOpcode(), NewSI, MatchOp);
}
+
+ assert(isa<ShiftInst>(TI) && "Should only have Shift here");
+ if (MatchIsOpZero)
+ return new ShiftInst(cast<ShiftInst>(TI)->getOpcode(), MatchOp, NewSI);
+ else
+ return new ShiftInst(cast<ShiftInst>(TI)->getOpcode(), NewSI, MatchOp);
}
Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
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