[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp AlphaCodeEmitter.cpp AlphaISelDAGToDAG.cpp AlphaISelLowering.cpp AlphaInstrInfo.cpp AlphaJITInfo.cpp AlphaRegisterInfo.cpp
Bill Wendling
isanbard at gmail.com
Thu Dec 7 14:22:17 PST 2006
Changes in directory llvm/lib/Target/Alpha:
AlphaAsmPrinter.cpp updated: 1.57 -> 1.58
AlphaCodeEmitter.cpp updated: 1.19 -> 1.20
AlphaISelDAGToDAG.cpp updated: 1.62 -> 1.63
AlphaISelLowering.cpp updated: 1.74 -> 1.75
AlphaInstrInfo.cpp updated: 1.15 -> 1.16
AlphaJITInfo.cpp updated: 1.11 -> 1.12
AlphaRegisterInfo.cpp updated: 1.53 -> 1.54
---
Log message:
What should be the last unnecessary <iostream>s in the library.
---
Diffs of the changes: (+42 -50)
AlphaAsmPrinter.cpp | 9 ++++-----
AlphaCodeEmitter.cpp | 5 ++---
AlphaISelDAGToDAG.cpp | 3 +--
AlphaISelLowering.cpp | 4 +---
AlphaInstrInfo.cpp | 1 -
AlphaJITInfo.cpp | 37 ++++++++++++++++++-------------------
AlphaRegisterInfo.cpp | 33 ++++++++++++++++-----------------
7 files changed, 42 insertions(+), 50 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.57 llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.58
--- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.57 Thu Dec 7 11:39:14 2006
+++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Thu Dec 7 16:21:48 2006
@@ -24,7 +24,6 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
-#include <iostream>
using namespace llvm;
namespace {
@@ -105,7 +104,7 @@
return;
case MachineOperand::MO_Immediate:
- std::cerr << "printOp() does not handle immediate values\n";
+ cerr << "printOp() does not handle immediate values\n";
abort();
return;
@@ -265,13 +264,13 @@
"\t.section .data", I);
break;
case GlobalValue::GhostLinkage:
- std::cerr << "GhostLinkage cannot appear in AlphaAsmPrinter!\n";
+ cerr << "GhostLinkage cannot appear in AlphaAsmPrinter!\n";
abort();
case GlobalValue::DLLImportLinkage:
- std::cerr << "DLLImport linkage is not supported by this target!\n";
+ cerr << "DLLImport linkage is not supported by this target!\n";
abort();
case GlobalValue::DLLExportLinkage:
- std::cerr << "DLLExport linkage is not supported by this target!\n";
+ cerr << "DLLExport linkage is not supported by this target!\n";
abort();
default:
assert(0 && "Unknown linkage type!");
Index: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
diff -u llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.19 llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.20
--- llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.19 Wed Dec 6 11:46:32 2006
+++ llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp Thu Dec 7 16:21:48 2006
@@ -23,7 +23,6 @@
#include "llvm/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/Statistic.h"
-#include <iostream>
using namespace llvm;
namespace {
@@ -158,7 +157,7 @@
rv = MO.getImmedValue();
} else if (MO.isGlobalAddress() || MO.isExternalSymbol()
|| MO.isConstantPoolIndex()) {
- DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
+ DOUT << MO << " is a relocated op for " << MI << "\n";
unsigned Reloc = 0;
int Offset = 0;
bool useGOT = false;
@@ -214,7 +213,7 @@
Alpha::reloc_bsr,
MO.getMachineBasicBlock()));
}else {
- std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+ cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();
}
Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.62 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.63
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.62 Thu Nov 2 14:25:49 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Thu Dec 7 16:21:48 2006
@@ -29,7 +29,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
-#include <iostream>
#include <queue>
#include <set>
using namespace llvm;
@@ -115,7 +114,7 @@
unsigned at = CountLeadingZeros_64(x);
uint64_t complow = 1 << (63 - at);
uint64_t comphigh = 1 << (64 - at);
- //std::cerr << x << ":" << complow << ":" << comphigh << "\n";
+ //cerr << x << ":" << complow << ":" << comphigh << "\n";
if (abs(complow - x) <= abs(comphigh - x))
return complow;
else
Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.74 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.75
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.74 Thu Nov 2 19:18:29 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Thu Dec 7 16:21:48 2006
@@ -22,8 +22,6 @@
#include "llvm/Function.h"
#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
-#include <iostream>
-
using namespace llvm;
/// AddLiveIn - This helper function adds the specified physical register to the
@@ -224,7 +222,7 @@
if (ArgNo < 6) {
switch (ObjectVT) {
default:
- std::cerr << "Unknown Type " << ObjectVT << "\n";
+ cerr << "Unknown Type " << ObjectVT << "\n";
abort();
case MVT::f64:
args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo],
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.15 llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.16
--- llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.15 Mon Nov 27 17:37:22 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.cpp Thu Dec 7 16:21:48 2006
@@ -15,7 +15,6 @@
#include "AlphaInstrInfo.h"
#include "AlphaGenInstrInfo.inc"
#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include <iostream>
using namespace llvm;
AlphaInstrInfo::AlphaInstrInfo()
Index: llvm/lib/Target/Alpha/AlphaJITInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaJITInfo.cpp:1.11 llvm/lib/Target/Alpha/AlphaJITInfo.cpp:1.12
--- llvm/lib/Target/Alpha/AlphaJITInfo.cpp:1.11 Thu Jul 27 13:20:17 2006
+++ llvm/lib/Target/Alpha/AlphaJITInfo.cpp Thu Dec 7 16:21:48 2006
@@ -18,7 +18,6 @@
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include <cstdlib>
-#include <iostream>
#include <map>
using namespace llvm;
@@ -58,12 +57,12 @@
AtI[0] = BUILD_OR(0, 27, 27);
- DEBUG(std::cerr << "Stub targeting " << To << "\n");
+ DOUT << "Stub targeting " << To << "\n";
for (int x = 1; x <= 8; ++x) {
AtI[2*x - 1] = BUILD_SLLi(27,27,8);
unsigned d = (Fn >> (64 - 8 * x)) & 0x00FF;
- // DEBUG(std::cerr << "outputing " << hex << d << dec << "\n");
+ //DOUT << "outputing " << hex << d << dec << "\n";
AtI[2*x] = BUILD_ORi(27, 27, d);
}
AtI[17] = BUILD_JMP(31,27,0); //jump, preserving ra, and setting pv
@@ -87,12 +86,12 @@
//rewrite the stub to an unconditional branch
if (((unsigned*)CameFromStub)[18] == 0x00FFFFFF) {
- DEBUG(std::cerr << "Came from a stub, rewriting\n");
+ DOUT << "Came from a stub, rewriting\n";
EmitBranchToAt(CameFromStub, Target);
} else {
- DEBUG(std::cerr << "confused, didn't come from stub at " << CameFromStub
- << " old jump vector " << oldpv
- << " new jump vector " << Target << "\n");
+ DOUT << "confused, didn't come from stub at " << CameFromStub
+ << " old jump vector " << oldpv
+ << " new jump vector " << Target << "\n";
}
//Change pv to new Target
@@ -185,7 +184,7 @@
);
#else
void AlphaCompilationCallback() {
- std::cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
+ cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
abort();
}
#endif
@@ -199,7 +198,7 @@
for (int x = 0; x < 19; ++ x)
MCE.emitWordLE(0);
EmitBranchToAt(Addr, Fn);
- DEBUG(std::cerr << "Emitting Stub to " << Fn << " at [" << Addr << "]\n");
+ DOUT << "Emitting Stub to " << Fn << " at [" << Addr << "]\n";
return MCE.finishFunctionStub(0);
}
@@ -250,30 +249,30 @@
case Alpha::reloc_literal:
//This is a LDQl
idx = MR->getGOTIndex();
- DEBUG(std::cerr << "Literal relocation to slot " << idx);
+ DOUT << "Literal relocation to slot " << idx;
idx = (idx - GOToffset) * 8;
- DEBUG(std::cerr << " offset " << idx << "\n");
+ DOUT << " offset " << idx << "\n";
break;
case Alpha::reloc_gprellow:
idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
idx = getLower16(idx);
- DEBUG(std::cerr << "gprellow relocation offset " << idx << "\n");
- DEBUG(std::cerr << " Pointer is " << (void*)MR->getResultPointer()
- << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
+ DOUT << "gprellow relocation offset " << idx << "\n";
+ DOUT << " Pointer is " << (void*)MR->getResultPointer()
+ << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n";
break;
case Alpha::reloc_gprelhigh:
idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
idx = getUpper16(idx);
- DEBUG(std::cerr << "gprelhigh relocation offset " << idx << "\n");
- DEBUG(std::cerr << " Pointer is " << (void*)MR->getResultPointer()
- << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
+ DOUT << "gprelhigh relocation offset " << idx << "\n";
+ DOUT << " Pointer is " << (void*)MR->getResultPointer()
+ << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n";
break;
case Alpha::reloc_gpdist:
switch (*RelocPos >> 26) {
case 0x09: //LDAH
idx = &GOTBase[GOToffset * 8] - (unsigned char*)RelocPos;
idx = getUpper16(idx);
- DEBUG(std::cerr << "LDAH: " << idx << "\n");
+ DOUT << "LDAH: " << idx << "\n";
//add the relocation to the map
gpdistmap[std::make_pair(Function, MR->getConstantVal())] = RelocPos;
break;
@@ -283,7 +282,7 @@
idx = &GOTBase[GOToffset * 8] -
(unsigned char*)gpdistmap[std::make_pair(Function, MR->getConstantVal())];
idx = getLower16(idx);
- DEBUG(std::cerr << "LDA: " << idx << "\n");
+ DOUT << "LDA: " << idx << "\n";
break;
default:
assert(0 && "Cannot handle gpdist yet");
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.53 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.54
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.53 Mon Nov 27 17:37:22 2006
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Thu Dec 7 16:21:48 2006
@@ -30,7 +30,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
-#include <iostream>
using namespace llvm;
//These describe LDAx
@@ -63,8 +62,8 @@
MachineBasicBlock::iterator MI,
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const {
- //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to "
- //<< FrameIdx << "\n";
+ //cerr << "Trying to store " << getPrettyName(SrcReg) << " to "
+ // << FrameIdx << "\n";
//BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
if (RC == Alpha::F4RCRegisterClass)
BuildMI(MBB, MI, TII.get(Alpha::STS))
@@ -84,8 +83,8 @@
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC) const {
- //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to "
- //<< FrameIdx << "\n";
+ //cerr << "Trying to load " << getPrettyName(DestReg) << " to "
+ // << FrameIdx << "\n";
if (RC == Alpha::F4RCRegisterClass)
BuildMI(MBB, MI, TII.get(Alpha::LDS), DestReg)
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
@@ -139,7 +138,7 @@
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const {
- // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
+ //cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
if (RC == Alpha::GPRCRegisterClass) {
BuildMI(MBB, MI, TII.get(Alpha::BISr), DestReg).addReg(SrcReg).addReg(SrcReg);
} else if (RC == Alpha::F4RCRegisterClass) {
@@ -147,8 +146,8 @@
} else if (RC == Alpha::F8RCRegisterClass) {
BuildMI(MBB, MI, TII.get(Alpha::CPYST), DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
- std::cerr << "Attempt to copy register that is not GPR or FPR";
- abort();
+ cerr << "Attempt to copy register that is not GPR or FPR";
+ abort();
}
}
@@ -255,16 +254,16 @@
// Now add the frame object offset to the offset from the virtual frame index.
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
- DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
+ DOUT << "FI: " << FrameIndex << " Offset: " << Offset << "\n";
Offset += MF.getFrameInfo()->getStackSize();
- DEBUG(std::cerr << "Corrected Offset " << Offset <<
- " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
+ DOUT << "Corrected Offset " << Offset
+ << " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n";
if (Offset > IMM_HIGH || Offset < IMM_LOW) {
- DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: "
- << Offset << "\n");
+ DOUT << "Unconditionally using R28 for evil purposes Offset: "
+ << Offset << "\n";
//so in this case, we need to use a temporary register, and move the
//original inst off the SP/FP
//fix up the old:
@@ -309,8 +308,8 @@
// brackets around call sites.
//If there is a frame pointer, then we don't do this
NumBytes += MFI->getMaxCallFrameSize();
- DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
- << " to the stack due to calls\n");
+ DOUT << "Added " << MFI->getMaxCallFrameSize()
+ << " to the stack due to calls\n";
}
if (FP)
@@ -336,7 +335,7 @@
BuildMI(MBB, MBBI, TII.get(Alpha::LDA), Alpha::R30).addImm(getLower16(NumBytes))
.addReg(Alpha::R30);
} else {
- std::cerr << "Too big a stack frame at " << NumBytes << "\n";
+ cerr << "Too big a stack frame at " << NumBytes << "\n";
abort();
}
@@ -386,7 +385,7 @@
BuildMI(MBB, MBBI, TII.get(Alpha::LDA), Alpha::R30)
.addImm(getLower16(NumBytes)).addReg(Alpha::R30);
} else {
- std::cerr << "Too big a stack frame at " << NumBytes << "\n";
+ cerr << "Too big a stack frame at " << NumBytes << "\n";
abort();
}
}
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