[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp ScheduleDAG.cpp ScheduleDAGList.cpp ScheduleDAGRRList.cpp ScheduleDAGSimple.cpp SelectionDAG.cpp SelectionDAGISel.cpp SelectionDAGPrinter.cpp

Bill Wendling isanbard at gmail.com
Thu Dec 7 12:05:11 PST 2006



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.256 -> 1.257
LegalizeDAG.cpp updated: 1.421 -> 1.422
ScheduleDAG.cpp updated: 1.111 -> 1.112
ScheduleDAGList.cpp updated: 1.69 -> 1.70
ScheduleDAGRRList.cpp updated: 1.22 -> 1.23
ScheduleDAGSimple.cpp updated: 1.19 -> 1.20
SelectionDAG.cpp updated: 1.375 -> 1.376
SelectionDAGISel.cpp updated: 1.324 -> 1.325
SelectionDAGPrinter.cpp updated: 1.44 -> 1.45
---
Log message:

Removing even more <iostream> includes.


---
Diffs of the changes:  (+144 -155)

 DAGCombiner.cpp         |   32 ++++++++---------
 LegalizeDAG.cpp         |    9 ++---
 ScheduleDAG.cpp         |   48 ++++++++++++--------------
 ScheduleDAGList.cpp     |   17 ++++-----
 ScheduleDAGRRList.cpp   |   31 ++++++++---------
 ScheduleDAGSimple.cpp   |   30 +++++++---------
 SelectionDAG.cpp        |   86 ++++++++++++++++++++++++------------------------
 SelectionDAGISel.cpp    |   25 ++++++-------
 SelectionDAGPrinter.cpp |   21 +++++------
 9 files changed, 144 insertions(+), 155 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.256 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.257
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.256	Wed Dec  6 11:46:32 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Dec  7 14:04:42 2006
@@ -38,8 +38,6 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/CommandLine.h"
 #include <algorithm>
-#include <iostream>
-#include <algorithm>
 using namespace llvm;
 
 namespace {
@@ -101,9 +99,9 @@
                         bool AddTo = true) {
       assert(N->getNumValues() == NumTo && "Broken CombineTo call!");
       ++NodesCombined;
-      DEBUG(std::cerr << "\nReplacing.1 "; N->dump();
-            std::cerr << "\nWith: "; To[0].Val->dump(&DAG);
-            std::cerr << " and " << NumTo-1 << " other values\n");
+      DOUT << "\nReplacing.1 "; DEBUG(N->dump());
+      DOUT << "\nWith: "; DEBUG(To[0].Val->dump(&DAG));
+      DOUT << " and " << NumTo-1 << " other values\n";
       std::vector<SDNode*> NowDead;
       DAG.ReplaceAllUsesWith(N, To, &NowDead);
       
@@ -152,9 +150,9 @@
       
       // Replace the old value with the new one.
       ++NodesCombined;
-      DEBUG(std::cerr << "\nReplacing.2 "; TLO.Old.Val->dump();
-            std::cerr << "\nWith: "; TLO.New.Val->dump(&DAG);
-            std::cerr << '\n');
+      DOUT << "\nReplacing.2 "; DEBUG(TLO.Old.Val->dump());
+      DOUT << "\nWith: "; DEBUG(TLO.New.Val->dump(&DAG));
+      DOUT << '\n';
 
       std::vector<SDNode*> NowDead;
       DAG.ReplaceAllUsesOfValueWith(TLO.Old, TLO.New, NowDead);
@@ -455,9 +453,9 @@
                RV.Val->getOpcode() != ISD::DELETED_NODE &&
                "Node was deleted but visit returned new node!");
 
-        DEBUG(std::cerr << "\nReplacing.3 "; N->dump();
-              std::cerr << "\nWith: "; RV.Val->dump(&DAG);
-              std::cerr << '\n');
+        DOUT << "\nReplacing.3 "; DEBUG(N->dump());
+        DOUT << "\nWith: "; DEBUG(RV.Val->dump(&DAG));
+        DOUT << '\n';
         std::vector<SDNode*> NowDead;
         if (N->getNumValues() == RV.Val->getNumValues())
           DAG.ReplaceAllUsesWith(N, RV.Val, &NowDead);
@@ -2801,9 +2799,9 @@
     Result = DAG.getIndexedStore(SDOperand(N,0), BasePtr, Offset, AM);
   ++PreIndexedNodes;
   ++NodesCombined;
-  DEBUG(std::cerr << "\nReplacing.4 "; N->dump();
-        std::cerr << "\nWith: "; Result.Val->dump(&DAG);
-        std::cerr << '\n');
+  DOUT << "\nReplacing.4 "; DEBUG(N->dump());
+  DOUT << "\nWith: "; DEBUG(Result.Val->dump(&DAG));
+  DOUT << '\n';
   std::vector<SDNode*> NowDead;
   if (isLoad) {
     DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(0),
@@ -2924,9 +2922,9 @@
           : DAG.getIndexedStore(SDOperand(N,0), BasePtr, Offset, AM);
         ++PostIndexedNodes;
         ++NodesCombined;
-        DEBUG(std::cerr << "\nReplacing.5 "; N->dump();
-              std::cerr << "\nWith: "; Result.Val->dump(&DAG);
-              std::cerr << '\n');
+        DOUT << "\nReplacing.5 "; DEBUG(N->dump());
+        DOUT << "\nWith: "; DEBUG(Result.Val->dump(&DAG));
+        DOUT << '\n';
         std::vector<SDNode*> NowDead;
         if (isLoad) {
           DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(0),


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.421 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.422
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.421	Wed Nov 29 13:13:47 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Thu Dec  7 14:04:42 2006
@@ -24,7 +24,6 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/SmallVector.h"
-#include <iostream>
 #include <map>
 using namespace llvm;
 
@@ -556,7 +555,7 @@
     }
     // Otherwise this is an unhandled builtin node.  splat.
 #ifndef NDEBUG
-    std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+    cerr << "NODE: "; Node->dump(); cerr << "\n";
 #endif
     assert(0 && "Do not know how to legalize this operator!");
     abort();
@@ -2975,7 +2974,7 @@
     assert(0 && "CopyFromReg must be legal!");
   default:
 #ifndef NDEBUG
-    std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+    cerr << "NODE: "; Node->dump(); cerr << "\n";
 #endif
     assert(0 && "Do not know how to promote this operator!");
     abort();
@@ -4371,7 +4370,7 @@
     assert(0 && "CopyFromReg must be legal!");
   default:
 #ifndef NDEBUG
-    std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+    cerr << "NODE: "; Node->dump(); cerr << "\n";
 #endif
     assert(0 && "Do not know how to expand this operator!");
     abort();
@@ -5020,7 +5019,7 @@
   switch (Node->getOpcode()) {
   default: 
 #ifndef NDEBUG
-    Node->dump(); std::cerr << "\n";
+    Node->dump(); cerr << "\n";
 #endif
     assert(0 && "Unknown vector operation in PackVectorOp!");
   case ISD::VADD:


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.111 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.112
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.111	Fri Dec  1 15:48:44 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Thu Dec  7 14:04:42 2006
@@ -24,10 +24,8 @@
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
-#include <iostream>
 using namespace llvm;
 
-
 /// BuildSchedUnits - Build SUnits from the selection dag that we are input.
 /// This SUnit graph is similar to the SelectionDAG, but represents flagged
 /// together nodes with a single SUnit.
@@ -430,9 +428,9 @@
     if (CommuteSet.count(Node)) {
       MachineInstr *NewMI = TII->commuteInstruction(MI);
       if (NewMI == 0)
-        DEBUG(std::cerr << "Sched: COMMUTING FAILED!\n");
+        DOUT << "Sched: COMMUTING FAILED!\n";
       else {
-        DEBUG(std::cerr << "Sched: COMMUTED TO: " << *NewMI);
+        DOUT << "Sched: COMMUTED TO: " << *NewMI;
         if (MI != NewMI) {
           delete MI;
           MI = NewMI;
@@ -614,7 +612,7 @@
     if (SUnit *SU = Sequence[i])
       SU->dump(&DAG);
     else
-      std::cerr << "**** NOOP ****\n";
+      cerr << "**** NOOP ****\n";
   }
 }
 
@@ -634,14 +632,14 @@
 /// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or
 /// a group of nodes flagged together.
 void SUnit::dump(const SelectionDAG *G) const {
-  std::cerr << "SU(" << NodeNum << "): ";
+  cerr << "SU(" << NodeNum << "): ";
   Node->dump(G);
-  std::cerr << "\n";
+  cerr << "\n";
   if (FlaggedNodes.size() != 0) {
     for (unsigned i = 0, e = FlaggedNodes.size(); i != e; i++) {
-      std::cerr << "    ";
+      cerr << "    ";
       FlaggedNodes[i]->dump(G);
-      std::cerr << "\n";
+      cerr << "\n";
     }
   }
 }
@@ -649,35 +647,35 @@
 void SUnit::dumpAll(const SelectionDAG *G) const {
   dump(G);
 
-  std::cerr << "  # preds left       : " << NumPredsLeft << "\n";
-  std::cerr << "  # succs left       : " << NumSuccsLeft << "\n";
-  std::cerr << "  # chain preds left : " << NumChainPredsLeft << "\n";
-  std::cerr << "  # chain succs left : " << NumChainSuccsLeft << "\n";
-  std::cerr << "  Latency            : " << Latency << "\n";
-  std::cerr << "  Depth              : " << Depth << "\n";
-  std::cerr << "  Height             : " << Height << "\n";
+  cerr << "  # preds left       : " << NumPredsLeft << "\n";
+  cerr << "  # succs left       : " << NumSuccsLeft << "\n";
+  cerr << "  # chain preds left : " << NumChainPredsLeft << "\n";
+  cerr << "  # chain succs left : " << NumChainSuccsLeft << "\n";
+  cerr << "  Latency            : " << Latency << "\n";
+  cerr << "  Depth              : " << Depth << "\n";
+  cerr << "  Height             : " << Height << "\n";
 
   if (Preds.size() != 0) {
-    std::cerr << "  Predecessors:\n";
+    cerr << "  Predecessors:\n";
     for (SUnit::const_succ_iterator I = Preds.begin(), E = Preds.end();
          I != E; ++I) {
       if (I->second)
-        std::cerr << "   ch  #";
+        cerr << "   ch  #";
       else
-        std::cerr << "   val #";
-      std::cerr << I->first << " - SU(" << I->first->NodeNum << ")\n";
+        cerr << "   val #";
+      cerr << I->first << " - SU(" << I->first->NodeNum << ")\n";
     }
   }
   if (Succs.size() != 0) {
-    std::cerr << "  Successors:\n";
+    cerr << "  Successors:\n";
     for (SUnit::const_succ_iterator I = Succs.begin(), E = Succs.end();
          I != E; ++I) {
       if (I->second)
-        std::cerr << "   ch  #";
+        cerr << "   ch  #";
       else
-        std::cerr << "   val #";
-      std::cerr << I->first << " - SU(" << I->first->NodeNum << ")\n";
+        cerr << "   val #";
+      cerr << I->first << " - SU(" << I->first->NodeNum << ")\n";
     }
   }
-  std::cerr << "\n";
+  cerr << "\n";
 }


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.69 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.70
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp:1.69	Wed Dec  6 11:46:32 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp	Thu Dec  7 14:04:42 2006
@@ -31,7 +31,6 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include <climits>
-#include <iostream>
 #include <queue>
 using namespace llvm;
 
@@ -93,7 +92,7 @@
 
 /// Schedule - Schedule the DAG using list scheduling.
 void ScheduleDAGList::Schedule() {
-  DEBUG(std::cerr << "********** List Scheduling **********\n");
+  DOUT << "********** List Scheduling **********\n";
   
   // Build scheduling units.
   BuildSchedUnits();
@@ -104,9 +103,9 @@
   
   AvailableQueue->releaseState();
   
-  DEBUG(std::cerr << "*** Final schedule ***\n");
+  DOUT << "*** Final schedule ***\n";
   DEBUG(dumpSchedule());
-  DEBUG(std::cerr << "\n");
+  DOUT << "\n";
   
   // Emit in scheduled order
   EmitSchedule();
@@ -155,7 +154,7 @@
 /// count of its successors. If a successor pending count is zero, add it to
 /// the Available queue.
 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
-  DEBUG(std::cerr << "*** Scheduling [" << CurCycle << "]: ");
+  DOUT << "*** Scheduling [" << CurCycle << "]: ";
   DEBUG(SU->dump(&DAG));
   
   Sequence.push_back(SU);
@@ -259,7 +258,7 @@
     } else if (!HasNoopHazards) {
       // Otherwise, we have a pipeline stall, but no other problem, just advance
       // the current cycle and try again.
-      DEBUG(std::cerr << "*** Advancing cycle, no work to do\n");
+      DOUT << "*** Advancing cycle, no work to do\n";
       HazardRec->AdvanceCycle();
       ++NumStalls;
       ++CurCycle;
@@ -267,7 +266,7 @@
       // Otherwise, we have no instructions to issue and we have instructions
       // that will fault if we don't do this right.  This is the case for
       // processors without pipeline interlocks and other cases.
-      DEBUG(std::cerr << "*** Emitting noop\n");
+      DOUT << "*** Emitting noop\n";
       HazardRec->EmitNoop();
       Sequence.push_back(0);   // NULL SUnit* -> noop
       ++NumNoops;
@@ -281,9 +280,9 @@
   for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
     if (SUnits[i].NumPredsLeft != 0 || SUnits[i].NumChainPredsLeft != 0) {
       if (!AnyNotSched)
-        std::cerr << "*** List scheduling failed! ***\n";
+        cerr << "*** List scheduling failed! ***\n";
       SUnits[i].dump(&DAG);
-      std::cerr << "has not been scheduled!\n";
+      cerr << "has not been scheduled!\n";
       AnyNotSched = true;
     }
   }


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.22 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.23
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.22	Fri Dec  1 15:48:44 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp	Thu Dec  7 14:04:42 2006
@@ -27,7 +27,6 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include <climits>
-#include <iostream>
 #include <queue>
 #include "llvm/Support/CommandLine.h"
 using namespace llvm;
@@ -85,7 +84,7 @@
 
 /// Schedule - Schedule the DAG using list scheduling.
 void ScheduleDAGRRList::Schedule() {
-  DEBUG(std::cerr << "********** List Scheduling **********\n");
+  DOUT << "********** List Scheduling **********\n";
   
   // Build scheduling units.
   BuildSchedUnits();
@@ -107,9 +106,9 @@
 
   CommuteNodesToReducePressure();
   
-  DEBUG(std::cerr << "*** Final schedule ***\n");
+  DOUT << "*** Final schedule ***\n";
   DEBUG(dumpSchedule());
-  DEBUG(std::cerr << "\n");
+  DOUT << "\n";
   
   // Emit in scheduled order
   EmitSchedule();
@@ -186,9 +185,9 @@
   
 #ifndef NDEBUG
   if (PredSU->NumSuccsLeft < 0 || PredSU->NumChainSuccsLeft < 0) {
-    std::cerr << "*** List scheduling failed! ***\n";
+    cerr << "*** List scheduling failed! ***\n";
     PredSU->dump(&DAG);
-    std::cerr << " has been released too many times!\n";
+    cerr << " has been released too many times!\n";
     assert(0);
   }
 #endif
@@ -206,7 +205,7 @@
 /// count of its predecessors. If a predecessor pending count is zero, add it to
 /// the Available queue.
 void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
-  DEBUG(std::cerr << "*** Scheduling [" << CurCycle << "]: ");
+  DOUT << "*** Scheduling [" << CurCycle << "]: ";
   DEBUG(SU->dump(&DAG));
   SU->Cycle = CurCycle;
 
@@ -268,9 +267,9 @@
   for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
     if (SUnits[i].NumSuccsLeft != 0 || SUnits[i].NumChainSuccsLeft != 0) {
       if (!AnyNotSched)
-        std::cerr << "*** List scheduling failed! ***\n";
+        cerr << "*** List scheduling failed! ***\n";
       SUnits[i].dump(&DAG);
-      std::cerr << "has not been scheduled!\n";
+      cerr << "has not been scheduled!\n";
       AnyNotSched = true;
     }
   }
@@ -299,9 +298,9 @@
   
 #ifndef NDEBUG
   if (SuccSU->NumPredsLeft < 0 || SuccSU->NumChainPredsLeft < 0) {
-    std::cerr << "*** List scheduling failed! ***\n";
+    cerr << "*** List scheduling failed! ***\n";
     SuccSU->dump(&DAG);
-    std::cerr << " has been released too many times!\n";
+    cerr << " has been released too many times!\n";
     assert(0);
   }
 #endif
@@ -317,7 +316,7 @@
 /// count of its successors. If a successor pending count is zero, add it to
 /// the Available queue.
 void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
-  DEBUG(std::cerr << "*** Scheduling [" << CurCycle << "]: ");
+  DOUT << "*** Scheduling [" << CurCycle << "]: ";
   DEBUG(SU->dump(&DAG));
   SU->Cycle = CurCycle;
 
@@ -374,9 +373,9 @@
   for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
     if (!SUnits[i].isScheduled) {
       if (!AnyNotSched)
-        std::cerr << "*** List scheduling failed! ***\n";
+        cerr << "*** List scheduling failed! ***\n";
       SUnits[i].dump(&DAG);
-      std::cerr << "has not been scheduled!\n";
+      cerr << "has not been scheduled!\n";
       AnyNotSched = true;
     }
   }
@@ -707,8 +706,8 @@
               (!canClobber(SuccSU, DUSU) ||
                (!SU->isCommutable && SuccSU->isCommutable))){
             if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
-              DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
-                    << " to SU #" << SuccSU->NodeNum << "\n");
+              DOUT << "Adding an edge from SU # " << SU->NodeNum
+                   << " to SU #" << SuccSU->NodeNum << "\n";
               if (SU->addPred(SuccSU, true))
                 SU->NumChainPredsLeft++;
               if (SuccSU->addSucc(SU, true))


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.19 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.20
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp:1.19	Thu Nov  2 14:25:49 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp	Thu Dec  7 14:04:42 2006
@@ -25,10 +25,8 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Compiler.h"
 #include <algorithm>
-#include <iostream>
 using namespace llvm;
 
-
 namespace {
 
 static RegisterScheduler
@@ -475,7 +473,7 @@
   
   /// print - Print ordering to specified output stream.
   ///
-  void print(std::ostream &O) const;
+  void print(OStream &O) const;
   
   void dump(const char *tag) const;
   
@@ -487,7 +485,7 @@
 
   /// printNI - Print node info.
   ///
-  void printNI(std::ostream &O, NodeInfo *NI) const;
+  void printNI(OStream &O, NodeInfo *NI) const;
   
   /// printChanges - Hilight changes in order caused by scheduling.
   ///
@@ -638,7 +636,7 @@
 
 /// print - Print ordering to specified output stream.
 ///
-void ScheduleDAGSimple::print(std::ostream &O) const {
+void ScheduleDAGSimple::print(OStream &O) const {
 #ifndef NDEBUG
   O << "Ordering\n";
   for (unsigned i = 0, N = Ordering.size(); i < N; i++) {
@@ -659,11 +657,11 @@
 }
 
 void ScheduleDAGSimple::dump(const char *tag) const {
-  std::cerr << tag; dump();
+  cerr << tag; dump();
 }
 
 void ScheduleDAGSimple::dump() const {
-  print(std::cerr);
+  print(cerr);
 }
 
 
@@ -712,7 +710,7 @@
 
 /// printNI - Print node info.
 ///
-void ScheduleDAGSimple::printNI(std::ostream &O, NodeInfo *NI) const {
+void ScheduleDAGSimple::printNI(OStream &O, NodeInfo *NI) const {
 #ifndef NDEBUG
   SDNode *Node = NI->Node;
   O << " "
@@ -741,25 +739,25 @@
   }
   
   if (i < N) {
-    std::cerr << Index << ". New Ordering\n";
+    cerr << Index << ". New Ordering\n";
     
     for (i = 0; i < N; i++) {
       NodeInfo *NI = Ordering[i];
-      std::cerr << "  " << NI->Preorder << ". ";
-      printNI(std::cerr, NI);
-      std::cerr << "\n";
+      cerr << "  " << NI->Preorder << ". ";
+      printNI(cerr, NI);
+      cerr << "\n";
       if (NI->isGroupDominator()) {
         NodeGroup *Group = NI->Group;
         for (NIIterator NII = Group->group_begin(), E = Group->group_end();
              NII != E; NII++) {
-          std::cerr << "          ";
-          printNI(std::cerr, *NII);
-          std::cerr << "\n";
+          cerr << "          ";
+          printNI(cerr, *NII);
+          cerr << "\n";
         }
       }
     }
   } else {
-    std::cerr << Index << ". No Changes\n";
+    cerr << Index << ". No Changes\n";
   }
 #endif
 }


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.375 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.376
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.375	Fri Dec  1 20:22:01 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Thu Dec  7 14:04:42 2006
@@ -559,7 +559,7 @@
   if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
       !N->isTargetOpcode()) {
     N->dump();
-    std::cerr << "\n";
+    cerr << "\n";
     assert(0 && "Node is not in map!");
   }
 #endif
@@ -2860,102 +2860,102 @@
 
 void SDNode::dump() const { dump(0); }
 void SDNode::dump(const SelectionDAG *G) const {
-  std::cerr << (void*)this << ": ";
+  cerr << (void*)this << ": ";
 
   for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
-    if (i) std::cerr << ",";
+    if (i) cerr << ",";
     if (getValueType(i) == MVT::Other)
-      std::cerr << "ch";
+      cerr << "ch";
     else
-      std::cerr << MVT::getValueTypeString(getValueType(i));
+      cerr << MVT::getValueTypeString(getValueType(i));
   }
-  std::cerr << " = " << getOperationName(G);
+  cerr << " = " << getOperationName(G);
 
-  std::cerr << " ";
+  cerr << " ";
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    if (i) std::cerr << ", ";
-    std::cerr << (void*)getOperand(i).Val;
+    if (i) cerr << ", ";
+    cerr << (void*)getOperand(i).Val;
     if (unsigned RN = getOperand(i).ResNo)
-      std::cerr << ":" << RN;
+      cerr << ":" << RN;
   }
 
   if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
-    std::cerr << "<" << CSDN->getValue() << ">";
+    cerr << "<" << CSDN->getValue() << ">";
   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
-    std::cerr << "<" << CSDN->getValue() << ">";
+    cerr << "<" << CSDN->getValue() << ">";
   } else if (const GlobalAddressSDNode *GADN =
              dyn_cast<GlobalAddressSDNode>(this)) {
     int offset = GADN->getOffset();
-    std::cerr << "<";
+    cerr << "<";
     WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
     if (offset > 0)
-      std::cerr << " + " << offset;
+      cerr << " + " << offset;
     else
-      std::cerr << " " << offset;
+      cerr << " " << offset;
   } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
-    std::cerr << "<" << FIDN->getIndex() << ">";
+    cerr << "<" << FIDN->getIndex() << ">";
   } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
-    std::cerr << "<" << JTDN->getIndex() << ">";
+    cerr << "<" << JTDN->getIndex() << ">";
   } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
     int offset = CP->getOffset();
     if (CP->isMachineConstantPoolEntry())
-      std::cerr << "<" << *CP->getMachineCPVal() << ">";
+      cerr << "<" << *CP->getMachineCPVal() << ">";
     else
-      std::cerr << "<" << *CP->getConstVal() << ">";
+      cerr << "<" << *CP->getConstVal() << ">";
     if (offset > 0)
-      std::cerr << " + " << offset;
+      cerr << " + " << offset;
     else
-      std::cerr << " " << offset;
+      cerr << " " << offset;
   } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
-    std::cerr << "<";
+    cerr << "<";
     const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
     if (LBB)
-      std::cerr << LBB->getName() << " ";
-    std::cerr << (const void*)BBDN->getBasicBlock() << ">";
+      cerr << LBB->getName() << " ";
+    cerr << (const void*)BBDN->getBasicBlock() << ">";
   } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
     if (G && R->getReg() && MRegisterInfo::isPhysicalRegister(R->getReg())) {
-      std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
+      cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
     } else {
-      std::cerr << " #" << R->getReg();
+      cerr << " #" << R->getReg();
     }
   } else if (const ExternalSymbolSDNode *ES =
              dyn_cast<ExternalSymbolSDNode>(this)) {
-    std::cerr << "'" << ES->getSymbol() << "'";
+    cerr << "'" << ES->getSymbol() << "'";
   } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
     if (M->getValue())
-      std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
+      cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
     else
-      std::cerr << "<null:" << M->getOffset() << ">";
+      cerr << "<null:" << M->getOffset() << ">";
   } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
-    std::cerr << ":" << getValueTypeString(N->getVT());
+    cerr << ":" << getValueTypeString(N->getVT());
   } else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
     bool doExt = true;
     switch (LD->getExtensionType()) {
     default: doExt = false; break;
     case ISD::EXTLOAD:
-      std::cerr << " <anyext ";
+      cerr << " <anyext ";
       break;
     case ISD::SEXTLOAD:
-      std::cerr << " <sext ";
+      cerr << " <sext ";
       break;
     case ISD::ZEXTLOAD:
-      std::cerr << " <zext ";
+      cerr << " <zext ";
       break;
     }
     if (doExt)
-      std::cerr << MVT::getValueTypeString(LD->getLoadedVT()) << ">";
+      cerr << MVT::getValueTypeString(LD->getLoadedVT()) << ">";
 
     const char *AM = getIndexedModeName(LD->getAddressingMode());
     if (AM != "")
-      std::cerr << " " << AM;
+      cerr << " " << AM;
   } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
     if (ST->isTruncatingStore())
-      std::cerr << " <trunc "
-                << MVT::getValueTypeString(ST->getStoredVT()) << ">";
+      cerr << " <trunc "
+           << MVT::getValueTypeString(ST->getStoredVT()) << ">";
 
     const char *AM = getIndexedModeName(ST->getAddressingMode());
     if (AM != "")
-      std::cerr << " " << AM;
+      cerr << " " << AM;
   }
 }
 
@@ -2964,16 +2964,16 @@
     if (N->getOperand(i).Val->hasOneUse())
       DumpNodes(N->getOperand(i).Val, indent+2, G);
     else
-      std::cerr << "\n" << std::string(indent+2, ' ')
-                << (void*)N->getOperand(i).Val << ": <multiple use>";
+      cerr << "\n" << std::string(indent+2, ' ')
+           << (void*)N->getOperand(i).Val << ": <multiple use>";
 
 
-  std::cerr << "\n" << std::string(indent, ' ');
+  cerr << "\n" << std::string(indent, ' ');
   N->dump(G);
 }
 
 void SelectionDAG::dump() const {
-  std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
+  cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
   std::vector<const SDNode*> Nodes;
   for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
        I != E; ++I)
@@ -2988,7 +2988,7 @@
 
   if (getRoot().Val) DumpNodes(getRoot().Val, 2, this);
 
-  std::cerr << "\n\n";
+  cerr << "\n\n";
 }
 
 const Type *ConstantPoolSDNode::getType() const {


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.324 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.325
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.324	Tue Nov 28 19:58:12 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Thu Dec  7 14:04:42 2006
@@ -44,7 +44,6 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Compiler.h"
-#include <iostream>
 #include <algorithm>
 using namespace llvm;
 
@@ -2614,8 +2613,8 @@
                              true, UsesInputRegister, 
                              OutputRegs, InputRegs);
       if (Regs.Regs.empty()) {
-        std::cerr << "Couldn't allocate output reg for contraint '"
-                  << ConstraintCode << "'!\n";
+        cerr << "Couldn't allocate output reg for contraint '"
+             << ConstraintCode << "'!\n";
         exit(1);
       }
 
@@ -2686,8 +2685,8 @@
         InOperandVal = TLI.isOperandValidForConstraint(InOperandVal,
                                                        ConstraintCode[0], DAG);
         if (!InOperandVal.Val) {
-          std::cerr << "Invalid operand for inline asm constraint '"
-                    << ConstraintCode << "'!\n";
+          cerr << "Invalid operand for inline asm constraint '"
+               << ConstraintCode << "'!\n";
           exit(1);
         }
         
@@ -2826,9 +2825,9 @@
 // basic blocks, and the scheduler passes ownership of it to this method.
 MachineBasicBlock *TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
                                                        MachineBasicBlock *MBB) {
-  std::cerr << "If a target marks an instruction with "
-               "'usesCustomDAGSchedInserter', it must implement "
-               "TargetLowering::InsertAtEndOfBasicBlock!\n";
+  cerr << "If a target marks an instruction with "
+       << "'usesCustomDAGSchedInserter', it must implement "
+       << "TargetLowering::InsertAtEndOfBasicBlock!\n";
   abort();
   return 0;  
 }
@@ -3757,7 +3756,7 @@
 bool SelectionDAGISel::runOnFunction(Function &Fn) {
   MachineFunction &MF = MachineFunction::construct(&Fn, TLI.getTargetMachine());
   RegMap = MF.getSSARegMap();
-  DEBUG(std::cerr << "\n\n\n=== " << Fn.getName() << "\n");
+  DOUT << "\n\n\n=== " << Fn.getName() << "\n";
 
   // First, split all critical edges.
   //
@@ -4092,14 +4091,14 @@
   // Run the DAG combiner in pre-legalize mode.
   DAG.Combine(false, AA);
   
-  DEBUG(std::cerr << "Lowered selection DAG:\n");
+  DOUT << "Lowered selection DAG:\n";
   DEBUG(DAG.dump());
   
   // Second step, hack on the DAG until it only uses operations and types that
   // the target supports.
   DAG.Legalize();
   
-  DEBUG(std::cerr << "Legalized selection DAG:\n");
+  DOUT << "Legalized selection DAG:\n";
   DEBUG(DAG.dump());
   
   // Run the DAG combiner in post-legalize mode.
@@ -4111,7 +4110,7 @@
   // code to the MachineBasicBlock.
   InstructionSelectBasicBlock(DAG);
   
-  DEBUG(std::cerr << "Selected machine code:\n");
+  DOUT << "Selected machine code:\n";
   DEBUG(BB->dump());
 }  
 
@@ -4353,7 +4352,7 @@
       // Otherwise, this is a memory operand.  Ask the target to select it.
       std::vector<SDOperand> SelOps;
       if (SelectInlineAsmMemoryOperand(InOps[i+1], 'm', SelOps, DAG)) {
-        std::cerr << "Could not match memory address.  Inline asm failure!\n";
+        cerr << "Could not match memory address.  Inline asm failure!\n";
         exit(1);
       }
       


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.44 llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.45
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp:1.44	Fri Nov 17 07:07:55 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp	Thu Dec  7 14:04:42 2006
@@ -24,7 +24,6 @@
 #include "llvm/Config/config.h"
 #include <fstream>
 #include <sstream>
-#include <iostream>
 using namespace llvm;
 
 namespace llvm {
@@ -185,8 +184,8 @@
 #ifndef NDEBUG
   ViewGraph(this, "dag." + getMachineFunction().getFunction()->getName());
 #else
-  std::cerr << "SelectionDAG::viewGraph is only available in debug builds on "
-            << "systems with Graphviz or gv!\n";
+  cerr << "SelectionDAG::viewGraph is only available in debug builds on "
+       << "systems with Graphviz or gv!\n";
 #endif  // NDEBUG
 }
 
@@ -197,8 +196,8 @@
 #ifndef NDEBUG
   NodeGraphAttrs.clear();
 #else
-  std::cerr << "SelectionDAG::clearGraphAttrs is only available in debug builds"
-            << " on systems with Graphviz or gv!\n";
+  cerr << "SelectionDAG::clearGraphAttrs is only available in debug builds"
+       << " on systems with Graphviz or gv!\n";
 #endif
 }
 
@@ -209,8 +208,8 @@
 #ifndef NDEBUG
   NodeGraphAttrs[N] = Attrs;
 #else
-  std::cerr << "SelectionDAG::setGraphAttrs is only available in debug builds"
-            << " on systems with Graphviz or gv!\n";
+  cerr << "SelectionDAG::setGraphAttrs is only available in debug builds"
+       << " on systems with Graphviz or gv!\n";
 #endif
 }
 
@@ -227,8 +226,8 @@
   else
     return "";
 #else
-  std::cerr << "SelectionDAG::getGraphAttrs is only available in debug builds"
-            << " on systems with Graphviz or gv!\n";
+  cerr << "SelectionDAG::getGraphAttrs is only available in debug builds"
+       << " on systems with Graphviz or gv!\n";
   return std::string("");
 #endif
 }
@@ -239,8 +238,8 @@
 #ifndef NDEBUG
   NodeGraphAttrs[N] = std::string("color=") + Color;
 #else
-  std::cerr << "SelectionDAG::setGraphColor is only available in debug builds"
-            << " on systems with Graphviz or gv!\n";
+  cerr << "SelectionDAG::setGraphColor is only available in debug builds"
+       << " on systems with Graphviz or gv!\n";
 #endif
 }
 






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