[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp

Chris Lattner sabre at nondot.org
Mon Nov 27 11:55:22 PST 2006



Changes in directory llvm/lib/Transforms/Scalar:

InstructionCombining.cpp updated: 1.548 -> 1.549
---
Log message:

Fix PR1014: http://llvm.org/PR1014  and InstCombine/2006-11-27-XorBug.ll.



---
Diffs of the changes:  (+8 -10)

 InstructionCombining.cpp |   18 ++++++++----------
 1 files changed, 8 insertions(+), 10 deletions(-)


Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.548 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.549
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.548	Sun Nov 26 19:05:10 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp	Mon Nov 27 13:55:07 2006
@@ -939,17 +939,15 @@
     // Output known-1 are known to be set if set in only one of the LHS, RHS.
     uint64_t KnownOneOut = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
     
-    // If all of the unknown bits are known to be zero on one side or the other
-    // (but not both) turn this into an *inclusive* or.
+    // If all of the demanded bits are known to be zero on one side or the
+    // other, turn this into an *inclusive* or.
     //    e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
-    if (uint64_t UnknownBits = DemandedMask & ~(KnownZeroOut|KnownOneOut)) {
-      if ((UnknownBits & (KnownZero|KnownZero2)) == UnknownBits) {
-        Instruction *Or =
-          BinaryOperator::createOr(I->getOperand(0), I->getOperand(1),
-                                   I->getName());
-        InsertNewInstBefore(Or, *I);
-        return UpdateValueUsesWith(I, Or);
-      }
+    if ((DemandedMask & ~KnownZero & ~KnownZero2) == 0) {
+      Instruction *Or =
+        BinaryOperator::createOr(I->getOperand(0), I->getOperand(1),
+                                 I->getName());
+      InsertNewInstBefore(Or, *I);
+      return UpdateValueUsesWith(I, Or);
     }
     
     // If all of the demanded bits on one side are known, and all of the set






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