[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.td
Chris Lattner
sabre at nondot.org
Mon Nov 20 11:34:06 PST 2006
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.88 -> 1.89
PPCRegisterInfo.td updated: 1.40 -> 1.41
---
Log message:
r13 is the thread pointer on darwin/ppc64, don't allocate it.
---
Diffs of the changes: (+5 -5)
PPCRegisterInfo.cpp | 4 ++--
PPCRegisterInfo.td | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.88 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.89
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.88 Fri Nov 17 12:49:39 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Nov 20 13:33:51 2006
@@ -255,7 +255,7 @@
};
// 64-bit Darwin calling convention.
static const unsigned Darwin64_CalleeSaveRegs[] = {
- PPC::X13, PPC::X14, PPC::X15,
+ PPC::X14, PPC::X15,
PPC::X16, PPC::X17, PPC::X18, PPC::X19,
PPC::X20, PPC::X21, PPC::X22, PPC::X23,
PPC::X24, PPC::X25, PPC::X26, PPC::X27,
@@ -306,7 +306,7 @@
// 64-bit Darwin calling convention.
static const TargetRegisterClass * const Darwin64_CalleeSaveRegClasses[] = {
- &PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
+ &PPC::G8RCRegClass,&PPC::G8RCRegClass,
&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.40 llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.41
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.40 Thu Nov 16 16:43:37 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.td Mon Nov 20 13:33:51 2006
@@ -234,7 +234,7 @@
def G8RC : RegisterClass<"PPC", [i64], 64,
[X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12,
X30, X29, X28, X27, X26, X25, X24, X23, X22, X21, X20, X19, X18, X17,
- X16, X15, X14, X13, X31, X0, X1, LR8]>
+ X16, X15, X14, X31, X13, X0, X1, LR8]>
{
let MethodProtos = [{
iterator allocation_order_begin(const MachineFunction &MF) const;
@@ -248,9 +248,9 @@
G8RCClass::iterator
G8RCClass::allocation_order_end(const MachineFunction &MF) const {
if (needsFP(MF))
- return end()-4;
+ return end()-5;
else
- return end()-3;
+ return end()-4;
}
}];
}
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