[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Chris Lattner sabre at nondot.org
Fri Nov 17 17:57:33 PST 2006



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.231 -> 1.232
---
Log message:

on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
Also, valist should create a pointer RC reg class value, not a GPRC value.


---
Diffs of the changes:  (+8 -3)

 PPCISelLowering.cpp |   11 ++++++++---
 1 files changed, 8 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.231 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.232
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.231	Fri Nov 17 16:37:34 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Nov 17 19:57:19 2006
@@ -1155,13 +1155,13 @@
     case MVT::f32:
     case MVT::f64:
       // All FP arguments reserve stack space.
-      ArgOffset += ObjSize;
+      ArgOffset += isPPC64 ? 8 : ObjSize;
 
       // Every 4 bytes of argument space consumes one of the GPRs available for
       // argument passing.
       if (GPR_idx != Num_GPR_Regs) {
         ++GPR_idx;
-        if (ObjSize == 8 && GPR_idx != Num_GPR_Regs)
+        if (ObjSize == 8 && GPR_idx != Num_GPR_Regs && !isPPC64)
           ++GPR_idx;
       }
       if (FPR_idx != Num_FPR_Regs) {
@@ -1226,7 +1226,12 @@
     // result of va_next.
     SmallVector<SDOperand, 8> MemOps;
     for (; GPR_idx != Num_GPR_Regs; ++GPR_idx) {
-      unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
+      unsigned VReg;
+      if (isPPC64)
+        VReg = RegMap->createVirtualRegister(&PPC::G8RCRegClass);
+      else
+        VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
+
       MF.addLiveIn(GPR[GPR_idx], VReg);
       SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT);
       SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);






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