[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp PPCRegisterInfo.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.cpp updated: 1.30 -> 1.31
PPCRegisterInfo.cpp updated: 1.83 -> 1.84
---
Log message:

Properly transfer kill / dead info.

---
Diffs of the changes:  (+27 -13)

 PPCInstrInfo.cpp    |   10 ++++++++++
 PPCRegisterInfo.cpp |   30 +++++++++++++++++-------------
 2 files changed, 27 insertions(+), 13 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.30 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.31
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.30	Mon Nov 13 17:36:35 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp	Wed Nov 15 14:58:11 2006
@@ -147,8 +147,18 @@
   // Swap op1/op2
   unsigned Reg1 = MI->getOperand(1).getReg();
   unsigned Reg2 = MI->getOperand(2).getReg();
+  bool Reg1IsKill = MI->getOperand(1).isKill();
+  bool Reg2IsKill = MI->getOperand(2).isKill();
   MI->getOperand(2).setReg(Reg1);
   MI->getOperand(1).setReg(Reg2);
+  if (Reg1IsKill)
+    MI->getOperand(2).setIsKill();
+  else
+    MI->getOperand(2).unsetIsKill();
+  if (Reg2IsKill)
+    MI->getOperand(1).setIsKill();
+  else
+    MI->getOperand(1).unsetIsKill();
   
   // Swap the mask around.
   unsigned MB = MI->getOperand(4).getImmedValue();


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.83 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.84
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.83	Wed Nov 15 11:40:51 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Wed Nov 15 14:58:11 2006
@@ -337,47 +337,51 @@
   // Make sure this is a reg-reg copy.  Note that we can't handle MCRF, because
   // it takes more than one instruction to store it.
   unsigned Opc = MI->getOpcode();
-  
+
+  MachineInstr *NewMI = NULL;
   if ((Opc == PPC::OR &&
        MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(TII, PPC::STW,
-                                       3).addReg(InReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::STW,
+                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(TII, PPC::LWZ, 2, OutReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::LWZ, 2, OutReg), FrameIndex);
     }
   } else if ((Opc == PPC::OR8 &&
               MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(TII, PPC::STD,
-                                       3).addReg(InReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::STD,
+                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(TII, PPC::LD, 2, OutReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::LD, 2, OutReg), FrameIndex);
     }
   } else if (Opc == PPC::FMRD) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(TII, PPC::STFD,
-                                       3).addReg(InReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::STFD,
+                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(TII, PPC::LFD, 2, OutReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::LFD, 2, OutReg), FrameIndex);
     }
   } else if (Opc == PPC::FMRS) {
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
-      return addFrameReference(BuildMI(TII, PPC::STFS,
+      NewMI = addFrameReference(BuildMI(TII, PPC::STFS,
                                        3).addReg(InReg), FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
-      return addFrameReference(BuildMI(TII, PPC::LFS, 2, OutReg), FrameIndex);
+      NewMI = addFrameReference(BuildMI(TII, PPC::LFS, 2, OutReg), FrameIndex);
     }
   }
-  return 0;
+
+  if (NewMI)
+    NewMI->copyKillDeadInfo(MI);
+  return NewMI;
 }
 
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