[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Chris Lattner
sabre at nondot.org
Mon Nov 13 17:38:46 PST 2006
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.224 -> 1.225
---
Log message:
minor tweaks, reject vector preinc.
---
Diffs of the changes: (+9 -4)
PPCISelLowering.cpp | 13 +++++++++----
1 files changed, 9 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.224 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.225
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.224 Fri Nov 10 18:08:42 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Nov 13 19:38:31 2006
@@ -874,17 +874,22 @@
if (!EnablePPCPreinc) return false;
SDOperand Ptr;
+ MVT::ValueType VT;
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
Ptr = LD->getBasePtr();
+ VT = LD->getValueType(0);
} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
ST = ST;
- //Ptr = ST->getBasePtr();
- //VT = ST->getStoredVT();
- // TODO: handle stores.
- return false;
+ Ptr = ST->getBasePtr();
+ VT = ST->getStoredVT();
+ return false; // TODO: Stores.
} else
return false;
+ // PowerPC doesn't have preinc load/store instructions for vectors.
+ if (MVT::isVector(VT))
+ return false;
+
// TODO: Handle reg+reg.
if (!SelectAddressRegImm(Ptr, Offset, Base, DAG))
return false;
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